IC-MB4_15 Datasheet, PDF (32/40 Pages) IC-Haus GmbH – BiSS INTERFACE MASTER

iC-MB4
BiSS INTERFACE MASTER
CONFIGURATION CHANNEL
preliminary
Rev B2, Page 32/40
SLAVELOC5
Addr. 0xEC; bit 4
R/W
0
Slaves 5-8 are connected to channel 1
1
Slaves 5-8 are connected to channel 2^∗
Table 54: Slave location
CFGIF
Addr. 0xF5; bit 3:2
R/W
0x00
TTL
0x01
CMOS
0x02
RS422^{∗ † ‡}
0x03
LVDS^{∗ â€} 
Table 55: Configure physical interface
The configuration of both channels control the type of
protocol that is applied by each channel.
CFGCH1
Addr. 0xED; bit 1:0
R/W
CFGCH2^∗
Addr. 0xED; bit 3:2
R/W
0x00
BiSS B
0x01
BiSS C
0x02
SSI
0x03
Channel is not used
Table 56: Channel configuration
In previous MB100 or iC-MB3 data sheets this con-
figuration was applied by the former parameter
SELSSI and BISSMOD.
CONFIGURATION SLAVE
ENSCD1
ENSCD2
ENSCD3
ENSCD4
ENSCD5
ENSCD6
ENSCD7
ENSCD8
0
1
Addr. 0xC0; bit 6
Addr. 0xC4; bit 6
Addr. 0xC8; bit 6
Addr. 0xCC; bit 6
Addr. 0xD0; bit 6
Addr. 0xD4; bit 6
Addr. 0xD8; bit 6
Addr. 0xDC; bit 6
Single cycle data not available
Single cycle data available
Table 57: Enable SCDx
R/W
GRAYS1
Addr. 0xC0; bit 7
R/W
R/W
GRAYS2
Addr. 0xC4; bit 7
R/W
R/W
GRAYS3
Addr. 0xC8; bit 7
R/W
R/W
GRAYS4
Addr. 0xCC; bit 7
R/W
R/W
GRAYS5
Addr. 0xD0; bit 7
R/W
R/W
GRAYS6
Addr. 0xD4; bit 7
R/W
R/W
GRAYS7
Addr. 0xD8; bit 7
R/W
R/W
GRAYS8
Addr. 0xDC; bit 7
R/W
0
SSI single cycle data binary coded
1
SSI single cycle data gray coded
Table 59: SSI format is Gray code
SCDLEN1
Addr. 0xC0; bit 5:0
R/W
SCDLEN2
Addr. 0xC4; bit 5:0
R/W
SCDLEN3
Addr. 0xC8; bit 5:0
R/W
SCDLEN4
Addr. 0xCC; bit 5:0
R/W
SCDLEN5
Addr. 0xD0; bit 5:0
R/W
SCDLEN6
Addr. 0xD4; bit 5:0
R/W
SCDLEN7
Addr. 0xD8; bit 5:0
R/W
SCDLEN8
Addr. 0xDC; bit 5:0
R/W
0
Single cycle data length = 1
1
Single cycle data length = 2
2
Single cycle data length = 3
...
Single cycle data length = SCDLENx +1
62
Single cycle data length = 63
63
Single cycle data length = 64
Table 58: Length of SCDx (-1)
∗ _{The second BiSS interface channel 2 is only available with}
iC-MB4 QFN28.
† _{RS422 and LVDS interfaces are only available with iC-MB4}
QFN28.
‡ _{RS422 interfaces are only operatable with VDD = 4.5 V ... 5.5 V}
LSTOP1
LSTOP2
LSTOP3
LSTOP4
LSTOP5
LSTOP6
LSTOP7
LSTOP8
0
1
Addr. 0xC0; bit 7
R/W
Addr. 0xC4; bit 7
R/W
Addr. 0xC8; bit 7
R/W
Addr. 0xCC; bit 7
R/W
Addr. 0xD0; bit 7
R/W
Addr. 0xD4; bit 7
R/W
Addr. 0xD8; bit 7
R/W
Addr. 0xDC; bit 7
R/W
No leading STOP bit on single cycle actuator data
Leading STOP bit on single cycle actuator data
Table 60: Actuator stop bit control