Z86D86 Datasheet, PDF (74/80 Pages) Zilog, Inc. – 28-Pin Low-Voltage OTP Microcontroller

Z86D86
28-Pin Low-Voltage OTP Microcontroller
66
WDTMR (0F) 0F
D7 D6 D5 D4 D3 D2 D1 D0
WDT TAP INT RC OSC
00
5 ms min
01*
10 ms min
10
20 ms min
11
80 ms min
External Clock
256 TpC
512 TpC
1024 TpC
4096 TpC
WDT during HALT
0 = OFF
1 = ON*
WDT during STOP
0 = OFF
1 = ON*
XTAL/INT RC Select for WDT
0 = RC OSC
1 = XTAL
Reserved (must be 0)
* Default setting after reset
Figure 51. Watch-Dog Timer Mode Register—Write Only
WDT Time Select (D0, D1)
This bit selects the WDT time period. It is configured as indicated in Table 25.
Table 25. WDT Time Select*
D1
D0 Time-Out of Internal RC OSC
0
0
0
1
1
0
1
1
5 ms min
10 ms min
20 ms min
80 ms min
Notes:
*TpC = XTAL clock cycle. The default on reset is 10 ms.
Time-Out of XTAL Clock
256 TpC
512 TpC
1024 TpC
4096 TpC
WDTMR During HALT (D2)
This bit determines whether or not the WDT is active during HALT Mode. A 1 indi-
cates active during HALT. The default is 1.
PS008905-0105
PRELIMINARY