Z86D86 Datasheet, PDF (42/80 Pages) Zilog, Inc. – 28-Pin Low-Voltage OTP Microcontroller

Z86D86
28-Pin Low-Voltage OTP Microcontroller
34
Counter/Timer Registers
Table 8 describes the expanded register group D.
Table 8. Expanded Register Group D
(D)0Ch
(D)0Bh
(D)0Ah
(D)09h
(D)08h
(D)07h
(D)06h
(D)05h
(D)04h
(D)03h
(D)02h
(D)01h
(D)00h
LVD
HI8
LO8
HI16
LO16
TC16H
TC16L
TC8H
TC8L
Reserved
CTR2
CTR1
CTR0
Register Description
LBD(D)0Ch—Low Battery Detection Register
Bit 0 enables/disables the Low Battery Detection Circuit. Bit 1 flags if low battery is
detected. Interrupt 5 is triggered when the flag bit is set, given that IRQ5 is not
masked. See Table 9.
Note: The LVD flag will be valid after enabling the detection for 20 µS
(design estimation, not tested in production). LVD does not
work at STOP mode. It must be disabled during STOP mode in
order to reduce current.
PS008905-0105
PRELIMINARY