Z86C02 Datasheet, PDF (21/37 Pages) Zilog, Inc. – Two On-Board Comparators

Zilog
Z86C02/E02/L02
Cost Effective, 512-Byte ROM CMOS Z8^® Microcontrollers
r7 r6 r5 r4
r3 r2 r1 r0
R253
(Register Pointer)
The upper nibble of the register file address
provided by the register pointer specifies
the active working-register group.
FF
Register Group F
F0
R15 to R0
General-Purpose Registers (GPR). These registers are
undefined after the device is powered up. The registers
1 ^{keep their last value after any reset, as long as the reset}
occurs in the V_CC voltage-specified operating range. Note:
Register R254 has been designated as a general-purpose
register. But is set to 00Hex after any reset.
Counter/Timer. There is an 8-bit programmable
counter/timers (T1), each driven by its 6-bit programmable
prescaler. The T1 prescaler is driven by internal or external
clock sources. (Figure 15).
7F
70
6F
60
5F
50
4F
40
3F
Specified Working
30
Register Group
2F
20
1F
Register Group 1
10
0F
Register Group 0
I/O Ports
00
The lower nibble
of the register
file address
provided by the
instruction points
to the specified
register.
R15 to R0
R15 to R4
R3 to R0
Figure 14. Register Pointer
Stack Pointer. The Z8 has an 8-bit Stack Pointer (R255)
used for the internal stack that resides within the 60 gen-
eral-purpose registers. It is set to 00Hex after any reset.
The 6-bit prescaler divide the input frequency of the clock
source by any integer number from 1 to 64. The prescaler
drives its counter, which decrements the value (1 to 256)
that has been loaded into the counter. When both counter
and prescaler reach the end of count, a timer interrupt re-
quest IRQ5 (T1) is generated.
The counter can be programmed to start, stop, restart to
continue, or restart from the initial value. The counters are
also programmed to stop upon reaching zero (Single-Pass
mode) or to automatically reload the initial value and con-
tinue counting (Modulo-N Continuous Mode).
The counter, but not the prescaler, is read at any time with-
out disturbing its value or count mode. The clock source for
T1 is user-definable and is either the internal microproces-
sor clock divided by four, or an external signal input
through Port 3. The Timer Mode register configures the ex-
ternal timer input (P31) as an external clock, a trigger input
that is retriggerable or non-retriggerable, or used as a gate
input for the internal clock.
DS96DZ80301
PRELIMINARY
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