Z86C02 Datasheet, PDF (20/37 Pages) Zilog, Inc. – Two On-Board Comparators

Z86C02/E02/L02
Cost Effective, 512-Byte ROM CMOS Z8^® Microcontrollers
FUNCTIONAL DESCRIPTION (Continued)
Program Memory. The Z8 addresses up to 512 bytes of
internal program memory (Figure 12). The first 12 bytes of
program memory are reserved for the interrupt vectors.
These locations contain six 16-bit vectors that correspond
to the six available interrupts. Bytes 0-511 are on-chip one-
time programmable ROM.
1024
Location of
First Byte of
Instruction
Executed
After RESET 12
11
10
9
8
7
Interrupt
Vector ₆
(Lower Byte)
5
4
Interrupt
Vector ₃
(Upper Byte)
2
1
0
On-Chip
ROM
IRQ5
IRQ5
IRQ4
IRQ4
IRQ3
IRQ3
IRQ2
IRQ2
IRQ1
IRQ1
IRQ0
IRQ0
Figure 12. Program Memory Map
Register File. The Register File consists of three I/O port
registers, 61 general-purpose registers, and 12 control
and status registers R0-R3, R4-R127 and R241-R255, re-
spectively (Figure 13). General-purpose registers occupy
the 04H to 7FH address space. I/O ports are mapped as
per the existing CMOS Z8. The instructions can access
registers directly or indirectly through an 8-bit address
field. This allows short 4-bit register addressing using the
Register Pointer. In the 4-bit mode, the register file is divid-
ed into eight working register groups, each occupying 16
continuous locations. The Register Pointer (Figure 14) ad-
dresses the starting location of the active working-register
group.
Location
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
128
127
4
3
2
1
0
Zilog
Stack Pointer (Bits 7-0)
Reserved
Register Pointer
Program Control Flags
Interrupt Mask Register
Interrupt Request Register
Interrupt Priority Register
Ports 0-1 Mode
Port 3 Mode
Port 2 Mode
To Prescaler
Timer/Counter0
T1 Prescaler
Timer/Counter1
Timer Mode
Not Implemented
Indentifiers
SPL
RP
Flags
IMR
IRQ
IPR
P01M
P3M
P2M
PRE0
T0
PRE1
T1
TMR
General Purpose
Registers
Port 3
P3
Port 2
P2
Reserved
P1
Port 0
P0
Figure 13. Register File
20
PRELIMINARY
DS96DZ80301