Z16C32SL Datasheet, PDF (13/22 Pages) Zilog, Inc. – IUSC™ INTEGRATED UNIVERSAL SERIAL CONTROLLER

Zilog
AC CHARACTERISTICS
Timing Table
No Symbol
1 Tcyc
2 TwASl
3 TwASh
4 TwDSl
5 TwDSh
6 TdAS(DS)
7 TdDS(AS)
8 TdDS(DRa)
9 TdDS(DRv)
10 TdDS(DRn)
11 TdDS(DRz)
12 TsCS(AS)
13 ThCS(AS)
14 TsADD(AS)
15 ThADD(AS)
16 TsSIA(AS)
17 ThSIA(AS)
18 TsAD(AS)
19 ThAD(AS)
20 TsRW(DS)
21 ThRW(DS)
22 TsDSf(RRQ)
23 TdDSr(RRQ)
24 TsDW(DS)
25 ThDW(DS)
26 TdDSf(TRQ)
27 TdDSr(TRQ)
28 TwRDl
29 TwRDh
30 TdAS(RD)
31 TdRD(AS)
32 TdRD(DRa)
33 TdRD(DRv)
34 TdRD(DRn)
35 TdRD(DRz)
36 TdRDf(RRQ)
37 TdRDr(RRQ)
38 TwWRl
39 TwWRh
40 TdAS(WR)
41 TdWR(AS)
42 TsDW(WR)
43 ThDW(WR)
44 TdWRf(TRQ)
Parameter
Bus Cycle Time
/AS Low Width
/AS High Width
/DS Low Width
/DS High Width
/AS Rise to /DS Fall Delay Time
/DS Rise to /AS Fall Delay Time
/DS Fall to Data Active Delay
/DS Fall to Data Valid Delay
/DS Rise to Data Not Valid Delay
/DS Rise to Data Float Delay
/CS to /AS Rise Setup Time
/CS to /AS Rise Hold Time
Direct Address to /AS Rise Setup Time
Direct Address to /AS Rise Hold Time
Status /INTACK to /AS Rise Setup Time
Status /INTACK to /AS Rise Hold Time
Address to /AS Rise Setup Time
Address to /AS Rise Hold Time
R//W to /DS Fall Setup Time
R//W to /DS Fall Hold Time
/DS Fall to /RxREQ Inactive Delay
/DS Rise to /RxREQ Active Delay
Write Data to /DS Rise Setup Time
Write Data to DS Rise Hold Time
/DS Fall to /TxREQ Inactive Delay
/DS Rise to /TxREQ Active Delay
/RD Low Width
/RD High Width
/AS Rise to /RD Fall Delay Time
/RD Rise to /AS Fall Delay Time
/RD Fall to Data Active Delay
/RD Fall to Data Valid Delay
/RD Rise to Data Not Valid Delay
/RD Rise to Data Float Delay
/RD Fall to /RxREQ Inactive Delay
/RD Rise to /RxREQ Active Delay
/WR Low Width
/WR High Width
/AS Rise to /WR Fall Delay Time
/WR Rise to /AS Fall Delay Time
Write Data to /WR Rise Setup Time
Write Data to /WR Rise Hold Time
/WR Fall to /TxREQ Inactive Delay
Z16C32 SL1660 ONLY
IUSC^™ Integrated Universal Serial Controller
1
V_CC
T_A = 0°C to +70°C
Min
Max
Units Note(s)
110
ns
30
ns
60
ns
60
ns
50
ns
5
ns
5
ns
0
ns
60
ns
0
ns
20
ns
15
ns
5
ns
15
ns
1
5
ns
1
15
ns
5
ns
15
ns
5
ns
0
ns
25
ns
60
ns
4
0
ns
30
ns
0
ns
65
ns
5
0
ns
60
ns
50
ns
5
ns
5
ns
0
ns
60
ns
0
ns
20
ns
60
ns
4
0
ns
60
ns
50
ns
5
ns
5
ns
30
ns
0
ns
65
ns
5
CP97HHS0100
PRELIMINARY
1-13