ZL50015 Datasheet, PDF (70/122 Pages) Zarlink Semiconductor Inc – Enhanced 1 K Digital Switch with Stratum 4E DPLL

ZL50015
Data Sheet
External Read/Write Address: 004B_H
Reset Value: 0000_H
15
14
13
12
11
10
9
0
0
0
0
0
0
0
8
7
6
5
4
3
2
1
0
0
MTR PRS PRS PMS PMS PMS FDM FDM
1
0
2
1
0
1
0
Bit
6-5
Name
Description
PRS1 - 0
Preferred Reference Selection Bits
These bits select the preferred reference from one of the input references. They are used
only if the PMS2-0 bits are set to 001. Otherwise, these bits are ignored
PRS1
0
0
1
1
PRS0
0
1
0
1
Preferred Reference Selection
REF0
REF1
REF2
REF3
4-2
1-0
PMS2 - 0 Preference Mode Selection Bits
These bits select one of the preference modes:
PMS2
0
0
PMS1
0
0
PMS0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
110 - 111
Preference Mode
No Preference
Preference as per the setting
of the PRS1 - 0 bits
Force REF0
Force REF1
Force REF2
Force REF3
Reserved
If in automatic mode with a preferred reference (PMS2-0 = 001 and FDM1-0 = 00), the
automatic state machine will only switch between two references (as per Table 8). Please
see Section 12.1.3.2, “Automatic Reference Switching With Preferences“ on page 40 for
more details.
FDM1 - 0 Force DPLL Timing Mode
These bits force the DPLL into one of the valid operation modes.
FDM1
0
0
1
1
FDM0
0
1
0
1
DPLL TIMING Mode
Automatic
Normal
Holdover
Freerun
Table 34 - Reference Change Control Register (RCCR) Bits (continued)
70
Zarlink Semiconductor Inc.