ZL50409 Datasheet, PDF (66/135 Pages) Zarlink Semiconductor Inc – Managed 9-Port 10/100M Ethernet Switch

ZL50409
Data Sheet
Register
Description
MIRROR_SRC_MAC0
Mirror Source MAC
Address 0
MIRROR_SRC_MAC1
Mirror Source MAC
Address 1
MIRROR_SRC_MAC2
Mirror Source MAC
Address 2
MIRROR_SRC_MAC3
Mirror Source MAC
Address 3
MIRROR_SRC_MAC4
Mirror Source MAC
Address 4
MIRROR_SRC_MAC5
Mirror Source MAC
Address 5
MIRROR_CONTROL
Port Mirror Control
Register
RMAC_MIRROR0
RMAC Mirror 0
RMAC_MIRROR1
RMAC Mirror 1
8. Per Port QOS Control
FCRn
Flooding Control Register
n
BMRCn
Broadcast/Multicast Rate
Control n
PR100_n
Port Reservation for
RMAC Ports (n=0..7)
CPU Addr
R/W
(Hex)
I²C
Addr
(Hex)
706
R/W
NA
707
R/W
NA
708
R/W
NA
709
R/W
NA
70A
R/W
NA
70B
R/W
NA
70C
R/W
NA
710
R/W
NA
711
R/W
NA
800+n
820+n
840+n
R/W 04C+n
R/W 05E+n
R/W 06A+n
PR100_CPU
PRM
Port Reservation for CPU
Port
Port Reservation for
MMAC Port
848
R/W 073
849
R/W 072
PTH100_n
PTH100_CPU
PTHM
Port Threshold for RMAC
Ports (n=0..7)
860+n
R/W 0C2+n
Port Threshold for CPU
Port
868
R/W 0CB
Port Threshold for MMAC
Port
869
R/W 0CA
Table 13 - Register Description (continued)
Default Notes
000
000
000
000
000
000
000
000
000
000 (n=0..9)
000
006 ‘d1536/16
=‘d96,
‘d96>>4=’
h6
006
‘d96
024 ‘d96x6=‘d
576,
‘d576>>4
=’h24
003
½
003
½
012
½
66
Zarlink Semiconductor Inc.