MDS105 Datasheet, PDF (13/35 Pages) Zarlink Semiconductor Inc – Unmanaged 5-Port 10/100 Mbps Ethernet Switch

MDS105
Data Sheet
10.0 Management Interface
The MDS105 uses a standard parallel port interface to provide external CPU access to the internal registers. This
parallel interface is composed of 3 pins: DATA0, STROBE, and ACK. The DATA0 pin provides the address and data
content input to the MDS105, while the ACK pin provides the corresponding output to the external CPU. The
STROBE pin is provided as the clock for both serial data streams. Any of the MDS105 internal registers can be
modified through this parallel port interface¹.
Figure 3 - Write Command
Figure 4 - Read Command
Each management interface transfer consists of four parts:
1. A START pulse – occurs when DATA is sampled high when STROBE is rising followed by DATA being sampled
low when STROBE falls.
2. Register address strobed into DATA0 pin, using the high level of the STROBE pin.
3. Either a read or write command (see waveforms above).
4. Data to be written provided on DATA0, or data to be read provided on ACK.
Any command can be aborted in the middle by sending an ABORT pulse to the MDS105. An ABORT pulse occurs
when DATA is sampled low and STROBE is rising, followed by DATA being sampled high when STROBE falls.
1. The 3-bit parallel interface is not “parallel” in the usual sense of the word; it is actually a synchronous serial architecture. However, the
MDS105 management interface adheres to IEEE 1284 parallel port standards.
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