YMF715E Datasheet, PDF (30/54 Pages) YAMAHA CORPORATION – OPL3 Single-chip Audio System 3

YMF715Eɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹɹ
ɹ9-1-3. WSS compatible 16-bit CODEC
The followings are the I/Os for Window Sound System compatibility.
WSS base
(R)
WSS Configuration Register port
WSS base + 3h (R)
WSS Status Register port
WSS base + 4h (R/W) WSS CODEC Index address port
WSS base + 5h (R/W) WSS CODEC Index data port
WSS base + 6h (R/W) WSS CODEC Status port
WSS base + 7h (R/W) WSS CODEC PIO Data port
WSS Configuration Register (RO):
port
D7
D6
D5
D4
D3
D2
D1
D0
+0h
“0”
“0”
IRQ
DMA
This register is used to indicate what resources is assigned and it is read only register.
IRQ:
“0”: No interrupt channel is available
“1”: IRQ7 is available
“2”: IRQ9 is available
“3”: IRQ10 is available
“4”: IRQ11 is available
“5”-”7”: reserved.
DMA:
“0”: No DMA channel is available
“1”: DMA0
“2”: DMA1
Notice)
“3”: DMA3
“4”-“7”: reserved
In the case that CODEC is in Dual DMA mode, only playback DMA channels are valid
and recording DMA channels are ignored.
WSS Status Register (RO):
port
D7
D6
D5
D4
D3
D2
D1
D0
+03h SBHC
“0”
“04h”
WSS CODEC Direct Registers (R/W):
port
D7
D6
D5
D4
D3
D2
D1
D0
+4h
INIT
MCE
TRD
Index Address
+5h
Index Data
+6h
CU/L
CL/R CRDY SER
PU/L
P/R PRDY INT
+7h
PIO Data
May 21, 1997
-30-