YMF715E Datasheet, PDF (26/54 Pages) YAMAHA CORPORATION – OPL3 Single-chip Audio System 3

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OPL3 Data Register Array 1 (R/W)
Index
D7
D6
D5
00 - 01h
04h
-
-
05h
-
-
-
20 - 35h AM
VIB
EGT
40 - 55h
KSL
60 - 75h
AR
80 - 95h
SL
A0 - A8h
B0 - B8h
-
-
KON
C0 - C8h *
*
CHR
E0 - F5h
-
-
-
D4
D3
D2
D1
D0
LSI TEST
CONNECTION SEL
-
-
NEW3
*
NEW
KSR
MULT
TL
DR
RR
F-NUM (L)
BLOCK
F-NUM (H)
CHL
FB
CNT
-
-
WS
The bit remarked * indicates that these can be read and written but not effective.
Note :
The wait time of 960ns(min.) is needed before access to OPL3 registers.
ɹ9-1-2. Sound Blaster Pro compatibility
The followings are the I/Os for Sound Blaster Pro compatibility.
SB base
(R)
OPL3 Status port
SB base
(W)
OPL3 Address port for Register Array 0
SB base + 1h
(R/W) OPL3 Data register
SB base + 2h
(W)
OPL3 Address port for Register Array 1
SB base + 3h
(R/W) OPL3 Data port
SB base + 4h
(W)
SB Mixer Address port
SB base + 5h
(R/W) SB Mixer Data port
SB base + 6h
(W)
DSP Reset port
SB base + 8h
(R)
OPL3 Status port
SB base + 8h
(W)
OPL3 Address port for Register Array 0
SB base + 9h
(R/W) OPL3 Data port
SB base + Ah
(R)
DSP Read Data port
SB base + Ch
(R)
DSP Write-buffer status port
SB base + Ch
(W)
DSP Write Command/Data port
SB base + Eh
(R)
DSP Read-buffer status port
May 21, 1997
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