DS849 Datasheet, PDF (7/10 Pages) Xilinx, Inc – LogiCORE IP Spartan-6 FPGA Triple-Rate SDI v1.0

LogiCORE IP Spartan-6 FPGA Triple-Rate SDI v1.0
Triple-Rate SDI Receiver Overview
The Triple-Rate SDI receiver uses a single GTP reference clock frequency to receive all five supported SDI bit rates.
The receiver automatically determines the incoming SDI bit rate and configures itself and the GTP transceiver
appropriately for that SDI mode. The supported GTP receiver reference clock frequencies are: 148.5 MHz and
148.5/1.001 MHz. Either of these frequencies can be used, but only a single frequency is required. The receiver
constantly indicates, on dedicated output ports, which SDI mode (SD-SDI, HD-SDI, or 3G-SDI) is currently being
received. For HD-SDI and 3G-SDI, it also reports which of the two bit rates supported by these SDI standards is
being received. For 3G-SDI, the module also reports whether the data streams are compliant with level A or level B
of the SMPTE 425 standard.
The Triple-Rate SDI receiver automatically detects and captures SMPTE 352 payload ID packets in all SDI modes, if
they are present. The four user data words captured from these packets are output from the module on dedicated
ports.
The Triple-Rate SDI receiver automatically detects transport information about the incoming SDI signal. For
SD-SDI, the receiver reports whether the video stream is NTSC or PAL. In HD-SDI and 3G-SDI modes, it reports the
SMPTE standards family of the video signal (SMPTE 274, SMPTE 296, etc.), the frame rate, and whether the
transport is progressive or interlaced. This information is determined by examining the timing of the SDI transport
structure and is, therefore, not dependent on the presence of SMPTE 352 packets. This information represents the
transport characteristics, which are not always the same as the picture characteristics. For example, a progressive
1080p 60 Hz picture is carried on an interlaced transport signal in 3G-SDI level B-DL mode. The Triple-Rate SDI
receiver accurately reports that the transport is interlaced.
Operation of Triple-Rate SDI Receiver in SD-SDI Mode
In SD-SDI mode, the GTP receiver oversamples the 270 Mb/s SD-SDI bitstream by a factor of 5.5X, and the
Triple-Rate SDI receiver uses a digital PLL technique to recover the actual SD-SDI data stream from the
oversampled data with a very high level of jitter tolerance. The recovered data is output from the core as a 10-bit
interleaved luma/chroma data stream. In SD-SDI mode, the GTP receiver does not recover a clock. Instead, the
recovered clock output (GTPCLKOUT[1]) of the GTP receiver is locked to the reference clock. Also the Spartan-6
FPGA Triple-Rate SDI core generates a clock enable that is asserted on any cycle of the rxpipeclk clock in which
video data is output from the module, averaging to a 27 MHz output data rate on the 10-bit port. There are,
however, several techniques that can be used to produce a true recovered clock in SD-SDI mode. These SD-SDI data
recovery techniques are discussed in UG824, LogiCORE IP Spartan-6 FPGA Triple-Rate SDI User Guide.
In SD-SDI mode, the Triple-Rate SDI receiver detects SMPTE RP-165 EDH packets. It counts the number of fields
that contain EDH packet errors. Also it outputs the received AF, FF, and ANC flags from the EDH packet on
dedicated output ports. The EDH function makes the Spartan-6 FPGA Triple-Rate SDI core larger, but it is
automatically optimized out of the design if the EDH output ports of the core are not connected.
Operation of the Triple-Rate SDI Receiver in HD-SDI Mode
In HD-SDI mode, the GTP receiver locks to either HD-SDI bit rate (1.485 Gb/s and 1.485/1.001 Gb/s) and recovers
the data and a clock. The clock is frequency locked to the incoming HD-SDI bitstream with a nominal frequency of
either 74.25 MHz or 74.25/1.001 MHz, depending on the bit rate. The Triple-Rate SDI receiver outputs two 10-bit
data streams, one data stream for the luma channel and one for the chroma channel.
The Triple-Rate SDI receiver checks for CRC errors on every video line. It also captures the line number value
embedded in the data stream and outputs the captured line number on a dedicated output port.
DS849 June 22, 2011
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Product Specification