DS805 Datasheet, PDF (6/7 Pages) Xilinx, Inc – The external master interface ports directly connect

LogiCORE™ IP AXI External Slave Connector (v1.00.a)
Parameters
Table 4 lists the user-visible parameters for the IP. In addition to the parameters listed in this table, there are also
inferred parameters for the S_AXI interface in the EDK tools. Through the design, these inferred parameters control
the behavior of the AXI Interconnect. For a complete list of the interconnect settings related to the AXI interface, see
the AXI Interconnect IP Data Sheet (DS768).
Table 4: Parameters
Parameter Name
C_USE_ADVANCED_PORTS
C_S_AXI_PROTOCOL
C_S_AXI_ADDR_WIDTH
C_S_AXI_DATA_WIDTH
C_S_AXI_SUPPORTS_READ
C_S_AXI_SUPPORTS_WRITE
C_S_AXI_ID_WIDTH
C_S_AXI_SUPPORTS_NARROW_BURST
C_S_AXI_SUPPORTS_USER_SIGNALS
C_S_AXI_AWUSER_WIDTH
C_S_AXI_BUSER_WIDTH
C_S_AXI_ARUSER_WIDTH
C_S_AXI_WUSER_WIDTH
C_S_AXI_RUSER_WIDTH
C_S_AXI_RNG0-3_BASEADDR
C_S_AXI_RNG0-3_HIGHADDR
C_S_AXI_MEM_RNG0-3_BASEADDR
C_S_AXI_MEM_RNG0-3_HIGHADDR
Default Value
0
AXI4
32
32
1
1
1
1
0
1
1
1
1
1
0xFFFFFFFF ⁽²⁾
0x00000000 ⁽²⁾
0xFFFFFFFF ⁽²⁾
0x00000000 ⁽²⁾
Allowable
Values
Description
Controls whether the less-common (advanced)
0, 1
AXI signals are included in the external master
interface.
String
(AXI3, AXI4,
AXI4LITE)
AXI protocol used by the connected external slave
device.
constant
(32)
Width of ADDR signals (both S and M
interfaces).
Integer
(32, 64, 128, 256)
Specifies the width of the WDATA and RDATA
signals used by the connected external slave
device (applies to both S and M
interfaces).
0,1
Specifies whether the connected external slave
device performs Reads.
0,1
Specifies whether the connected external slave
device performs Writes.
1-16
Specifies the number of ID bits produced by the
AXI Interconnect to all connected slave devices.
Specifies whether the connected external slave
0,1
device supports “narrow bursts” (transfer SIZE less
than data width for any multi-beat bursts).
Specifies whether the connected external slave
0,1
device has any USER signals on any AXI
channels.
Integer
Specifies the number of AWUSER bits produced
(1-2147483647 by the connected external slave device.
Integer
Specifies the number of BUSER bits on the
(1-2147483647 connected external slave device.
Integer
Specifies the number of ARUSER bits on the
(1-2147483647 connected external slave device.
Integer
Specifies the number of WUSER bits on the
(1-2147483647 connected external slave device.
Integer
Specifies the number of RUSER bits on the
(1-2147483647 connected external slave device.
Valid Address ⁽¹⁾ Base address of register-type address range 0-3.
Valid Address ⁽¹⁾ High address of register-type address range 0-3.
Valid Address ⁽¹⁾ Base address of memory-type address range 0-3.
Valid Address⁽¹⁾ High address of memory-type address range 0-3.
C_S_AXI_NUM_ADDR_RANGES
1
0-4
Number of register-type address ranges.
DS805 January 18, 2012
www.xilinx.com
6
Product Specification