DS023 Datasheet, PDF (6/8 Pages) Xilinx, Inc – Lowest power 32 macrocell CPLD

XCR3032XL 32 Macrocell CPLD
Pin Descriptions
Table 2: XCR3032XL User I/O Pins
PC44
VQ44
Total User I/O Pins
36
36
Table 3: XCR3032XL I/O Pins
Function
Block Macrocell PC44
1
1
4
1
2
5
1
3
6
1
4
7⁽¹⁾
1
5
8
1
6
9
1
7
11
1
8
12
1
9
13⁽¹⁾
1
10
14
1
11
16
1
12
17
1
13
18
1
14
19
1
15
20
1
16
21
2
1
41
2
2
40
2
3
39
2
4
38⁽¹⁾
2
5
37
2
6
36
2
7
34
2
8
33
2
9
32⁽¹⁾
2
10
31
2
11
29
2
12
28
2
13
27
2
14
26
VQ44
42
43
44
1⁽¹⁾
2
3
5
6
7⁽¹⁾
8
10
11
12
13
14
15
35
34
33
32⁽¹⁾
31
30
28
27
26⁽¹⁾
25
23
22
21
20
CS48
36
CS48
A2
A1
C4
B1⁽¹⁾
C2
C1
D3
D1
D2⁽¹⁾
E1
F1
G1
E4
F2
G2
F3
C5
A6
B6
B7⁽¹⁾
D4
C6
D6
D7
E5⁽¹⁾
E7
F7
G7
G6
F5
R
Table 3: XCR3032XL I/O Pins
Function
Block Macrocell PC44
2
15
25
2
16
24
Notes:
1. JTAG pins
VQ44
19
18
CS48
G5
F4
Table 4: XCR3032XL Global, JTAG, Port Enable, Power,
and No Connect Pins
Pin Type
PC44
VQ44
CS48
IN0 / CLK0
2
40
A3
IN1 / CLK1
1
39
B4
IN2 / CLK2
44
38
A4
IN3 / CLK3
43
37
B5
TCK
32
26
E5
TDI
7
1
B1
TDO
38
32
B7
TMS
13
7
D2
PORT_EN
10⁽¹⁾
4⁽¹⁾
C3⁽¹⁾
V_CC
3, 15, 23, 9, 17, 29, B3, C7,
35
41
E2, G4
GND
22, 30, 42 16, 24, 36 A5, E3, E6
No Connects
-
-
A7, B2,
F6, G3
Notes:
1. Port Enable is brought High to enable JTAG pins when
JTAG pins are used as I/O. See family data sheet
(DS012) for full explanation.
6
www.xilinx.com
DS023 (v1.6) June 27, 2002
1-800-255-7778
Preliminary Product Specification