DS023 Datasheet, PDF (2/8 Pages) Xilinx, Inc – Lowest power 32 macrocell CPLD

XCR3032XL 32 Macrocell CPLD
R
DC Electrical Characteristics Over Recommended Operating Conditions⁽¹⁾
Symbol
Parameter
Test Conditions
Min.
Max. Unit
V_OH(2) Output High voltage
V_CC = 3.0V to 3.6V, I_OH = –8 mA
V_CC = 2.7V to 3.0V, I_OH = –8 mA
2.4
-
V
2.0⁽³⁾
-
V
I_OH = –500 µA
90% V_CC
-
V
V_OL
I_IL(4)
I_IH(4)
Output Low voltage
Input leakage current
I/O High-Z leakage current
I_OL = 8 mA
-
V_IN = GND or V_CC
–10
V_IN = GND or V_CC
–10
0.4
V
10
µA
10
µA
I_CCSB
I_CC
Standby current
Dynamic current^(5,6)
V_CC = 3.6V
f = 1 MHz
-
100
µA
-
0.25
mA
f = 50 MHz
-
7.5
mA
C_IN
C_CLK
C_I/O
Input pin capacitance⁽⁷⁾
Clock input capacitance⁽⁷⁾
I/O pin capacitance⁽⁷⁾
f = 1 MHz
f = 1 MHz
f = 1 MHz
-
8
pF
-
12
pF
-
10
pF
Notes:
1. See XPLA3 family data sheet (DS012) for recommended operating conditions
2. See Figure 2 for output drive characteristics of the XPLA3 family.
3. This parameter guaranteed by design and characterization, not by testing.
4. Typical leakage current is less than 1 µA.
5. See Table 1, Figure 1 for typical values.
6. This parameter measured with a 16-bit, resetable up/down counter loaded into every function block, with all outputs disabled and
unloaded. Inputs are tied to V_CC or ground. This parameter guaranteed by design and characterization, not testing.
7. Typical values, not tested.
100
90
IOL (3.3V)
80
70
60
50
IOH (3.3V)
40
30
IOH (2.7V)
20
10
0
0
0.5
1
1.5
2
2.5
3 3.5
4
4.5 5
Volts
DS012_10_031802
Figure 2: Typical I/V Curve for the XPLA3 Family, 3.3V, 25°C
2
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DS023 (v1.6) June 27, 2002
1-800-255-7778
Preliminary Product Specification