DS023 Datasheet, PDF (3/8 Pages) Xilinx, Inc – Lowest power 32 macrocell CPLD

R
XCR3032XL 32 Macrocell CPLD
AC Electrical Characteristics Over Recommended Operating Conditions^(1,2)
-5
Symbol
Parameter
Min. Max.
T_PD1
Propagation delay time (single p-term)
4.5
T_PD2
Propagation delay time (OR array)⁽³⁾
5.0
T_CO
Clock to output (global synchronous pin clock)
3.5
T_SUF
Setup time (fast input register)
2.5
-
T_SU1(4)
Setup time (single p-term)
3.0
-
T_SU2
T_H(4)
T_WLH(4)
T_PLH(4)
T_R(4)
T_L(4)
f_SYSTEM(4)
T_CONFIG(4)
T_INIT(4)
T_POE(4)
Setup time (OR array)
Hold time
Global Clock pulse width (High or Low)
P-term clock pulse width
Input rise time
Input fall time
Maximum system frequency
Configuration time⁽⁵⁾
ISP initialization time
P-term OE to output enabled
3.5
-
0
-
2.5
-
4.0
-
-
20
-
20
-
200
-
30
-
30
-
7.2
T_POD(4)
P-term OE to output disabled⁽⁶⁾
-
7.2
T_PCO(4)
P-term clock to output
-
6.0
T_PAO(4)
P-term set/reset to output valid
-
6.5
Notes:
1. Specifications measured with one output switching.
2. See XPLA3 family data sheet (DS012) for recommended operating conditions.
3. See Figure 4 for derating.
4. These parameters guaranteed by design and/or characterization, not testing.
5. Typical current draw during configuration is 3 mA at 3.6V.
6. Output C_L = 5 pF.
-7
Min. Max.
-
7.0
-
7.5
5.0
3.0
-
4.3
-
4.8
-
0
-
3.0
-
5.0
-
-
20
-
20
-
119
-
30
-
30
-
9.3
-
9.3
-
8.3
-
9.3
-10
Min. Max.
-
9.1
-
10.0
-
6.5
3.0
-
5.4
-
6.3
-
0
-
4.0
-
6.0
-
-
20
-
20
-
95
-
30
-
30
-
11.2
-
11.2
-
10.7
-
11.2
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
µs
µs
ns
ns
ns
ns
DS023 (v1.6) June 27, 2002
www.xilinx.com
3
Preliminary Product Specification
1-800-255-7778