XC17V00 Datasheet, PDF (2/12 Pages) Xilinx, Inc – XC17V00 Series Configuration

XC17V00 Series Configuration PROM
R
VCC VPP _GND
RESET/
OE
CE
or
OE/
RESET
CLK
CEO
Address Counter _TC
EPROM
Cell
Matrix
Output
OE
DATA
DS073_01_072600
Figure 1: Simplified Block Diagram for XC17V04, XC17V02, and XC17V01 (does not show programming circuit)
VCC VPP _GND
RESET/
OE
CE
or
OE/
RESET
CEO
CLK
BUSY
Address Counter _TC
EPROM
Cell
Matrix
Output 8
OE
7
7
D0 Data
(Serial or Parallel Mode)
D[1:7]
(SelectMAP Interface)
DS073_02_072600
Figure 2: Simplified Block Diagram for XC17V16 and XC17V08 (does not show programming circuit)
2
www.xilinx.com
DS073 (v1.0) July 26, 2000
1-800-255-7778
Advance Product Specification