X68C64 Datasheet, PDF (9/12 Pages) Xicor Inc. – E2 Micro-Peripheral

X68C64
E Controlled Write Cycle
Symbol
Parameter
PWASH
tASL
t_AHL
tDSW
tDHW
t_CSL
PWEH
tWC
t_ES
tRWS
tEH
t_BLC
Address Strobe Pulse Width
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
CE Setup Time
E Pulse Width
Write Cycle Time
Enable Setup Time
R/W Setup Time
E Hold Time
Byte Load Time (Page Write)
E Controlled Write Cycle
Min.
80
20
30
50
30
7
120
30
20
20
0.5
Max.
5
100
Units
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
µs
3868 PGM T10
CE
AS
A/D0–A/D7
PWASH
tASL
tCSL
tES
tAHL
AIN
A8–A12
A8–A12
R/W
tRWS
E
tEH
tEH
DIN
tDSW
tDHW
tEH
PWEH
3868 FHD F06
3868 FHD F06.1
Note: (4) t_WC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
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