X40620 Datasheet, PDF (7/17 Pages) Xicor Inc. – Dual Voltage CPU Supervisor with 64K Serial EEPROM

X40620
Device Protocol
The X40620 supports a bidirectional bus oriented pro-
tocol. The protocol defines any device that sends data
onto the bus as a transmitter and the receiving device
as a receiver. The device controlling the transfer is a
master and the device being controlled is the slave.
The master will always initiate data transfers and pro-
vide the clock for both transmit and receive operations.
Therefore, the X40620 will be considered a slave in all
applications.
After each byte written to or read from the X40620, the
address pointer is incremented by 1. This allows the
user to read from the entire device after sending only a
single address. It also allows an entire page to be writ-
ten in one operation. An exception to this address
incrementation occurs during a read. After reading
address 1FFFh the device goes into an idle mode, so
additional reads return all “1s”.
Clock and Data Conventions
Data states on the SDA line can change only during
SCL LOW. SDA changes during SCL HIGH are
reserved for indicating start and stop conditions. Refer
to Figure 7 and Figure 8.
Start Condition
All commands are preceeded by the start condition,
which is a HIGH to LOW transition of SDA when SCL
is HIGH. The X40620 continuously monitors the SDA
and SCL lines for the start condition and will not
respond to any command until this condition is met.
A start may be issued to terminate the input of a con-
trol byte or the input data to be written. This will reset
the device and leave it ready to begin a new read or
write command. A start bit generated while the part is
outputting data is accepted as a start as long as the
device is not outputting a ’zero’.
Stop Condition
All communications are be terminated by a stop condi-
tion. The stop condition is a LOW to HIGH transition of
SDA when SCL is HIGH. The stop condition is also
used to reset the device during a command or data
input sequence and will leave the device in the
standby power mode. As with starts, stops are recog-
nized while the device outputs data, as long as the
data output is not a ‘zero’.
Figure 7. Data Validity
SCL
SDA
Data Data
Stable Change
Figure 8. Definition of Start and Stop Conditions
SCL
SDA
Start Condition
Stop Condition
Acknowledge
Acknowledge is a software convention used to indicate
successful data transfer. The transmitting device,
either master or slave, will release the bus after trans-
mitting eight bits. During the ninth clock cycle the
receiver will pull the SDA line LOW to acknowledge
that it received the eight bits of data.
The X40620 will respond with an acknowledge after
recognition of a start condition and its slave address. If
both the device and a write condition have been
selected, the X40620 will respond with an acknowledge
after the receipt of each subsequent eight-bit word.
Table 1. X40620 Instruction Set
1st Byte after Start
1100 1000
1101 1000
1st Byte after Command
High Address
High Address
2nd Byte after Command
Low address
Low address
Command Description
Memory Array Read
Memory Array Write
Notes: Illegal command codes will be disregarded. The part will respond with a “no-ACK” to the illegal byte and then return to the standby mode.
Characteristics subject to change without notice. 7 of 17