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X40620 Datasheet, PDF (11/17 Pages) Xicor Inc. – Dual Voltage CPU Supervisor with 64K Serial EEPROM
X40620
EQUIVALENT A.C. LOAD CIRCUIT
Output
3V
1.3KΩ
100pF
A.C. TEST CONDITIONS
Input pulse levels
Input rise and fall times
Input and output timing level
Output load
VCC x 0.1 to VCC x 0.9
10ns
VCC x 0.5
100pF
AC CHARACTERISTICS
AC Specifications (Over the recommended operating conditions)
Symbol
Parameter
fSCL
tIN
tAA
tBUF
tLOW
tHIGH
tSU:STA
tHD:STA
tSU:DAT
tHD:DAT
tSU:STO
tDH
tR
tF
SCL Clock Frequency
Pulse width of spikes which must be suppressed by the input filter
SCL LOW to SDA Data Out Valid
Time the bus must be free before a new transmit can start
Clock LOW Time
Clock HIGH Time
Start Condition Setup Time
Start Condition Hold Time
Data In Setup Time
Data In Hold Time
Stop Condition Setup Time
Data Output Hold Time
SDA and SCL Rise Time (10% to 90% of VCC)
SDA and SCL Fall Time
Min.
0
10
0.05
0.5
0.6
0.4
0.25
0.25
100
0
0.25
0
10
10
Typ.(1)
100
Max.
1000
0.55
100
100
Units
KHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
ns
RESET AC SPECIFICATIONS
Nonvolatile Write Cycle Timing
Symbol
tWC(1)
Parameter
Write Cycle Time
Min.
Typ.(1)
5
Max.
10
Units
mS
Notes: (1) tWC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
Characteristics subject to change without notice. 11 of 17