X3100 Datasheet, PDF (23/40 Pages) Xicor Inc. – 3 or 4 Cell Li-Ion Battery Protection and Monitor IC

X3100/X3101 – Preliminary Information
Table 30. X3100/X3101 Instruction Set
Instruction
Name
Instruction
Format*
Description
WREN
0000 0110 Set the write enable latch (write enable operation)—Figure 11
WRDI
0000 0100 Reset the write enable latch (write disable operation)—Figure 11
EEWRITE
0000 0010 Write command followed by address/data (4kbit EEPROM)—Figure 12, Figure 13
EEREAD STAT 0000 0101 Reads IDLock settings & status of EEPROM EEWRITE instruction—Figure 14
EEREAD
0000 0011 Read operation followed by address (for 4kbit EEPROM)—Figure 15
WCFIG
0000 1001
Write to configuration register followed by two bytes of data—Figure 4, Figure 16.
Data stored in SRAM only and will power-up to previous settings—Figure 3
WCNTR
0000 1010 Write to control register, followed by two bytes of data—Figure 17
RDSTAT
0000 1011 Read contents of status register—Figure 18
SET IDL
0000 0001 Set EEPROM ID lock partition followed by partition byte—Figure 19
*Instructions have the MSB in leftmost position and are transferred MSB first.
Write Enable/Write Disable (WREN/WRDI)
Any write to a nonvolatile array or register, requires the
WREN command be sent prior to the write command.
This command sets an internal latch allowing the write
operation to proceed. The WRDI command resets the
internal latch if the system decides to abort a write
operation. See Figure 11.
Figure 11. EEPROM Write Enable Latch (WREN/WRDI) Operation Sequence
CS
SCK
SI
01234567
Instruction
(1 Byte)
High Impedance
SO
WREN
WRDI
REV 1.1.8 12/10/02
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Characteristics subject to change without notice. 23 of 40