WM8948 Datasheet, PDF (97/189 Pages) Wolfson Microelectronics plc – Stereo Low-Power CODEC with Video Buffer and Touch Panel Controller

Production Data
WM8948
Touch pressure can only be determined indirectly, using the results of two separate measurements.
A constant current is applied through the plates, and the voltage on each plate is measured. The
difference between the two voltages is proportional to the resistance between the plates, which is a
measure of the pressure being applied to the panel.
The configuration is illustrated in Figure 38. In this example, a constant current flows from the Top
(YP) connection to the Left (XN) connection. The Right (XP) and Bottom (YN) points are measured in
turn, and the difference, VX - VY is equal to IP x RC, where IP is the current applied and RC is the
resistance between the plates. The smaller the measured resistance, the greater the pressure being
applied.
WM8948
YP
LDOVDD
XP
AUX
ADC
Pressure
YN
XN
GND
Figure 38 Z-axis (Pressure) Touch Panel Measurement
GENERAL PURPOSE INPUT/OUTPUT
The WM8948 provides four multi-function pins which can be configured to provide a number of
different functions. These are digital input/output pins on the DBVDD power domain. The GPIO pins
are:
 GPIO1
 C¯ ¯S/GPIO2
 CIFMODE/GPIO3
 SDOUT/GPIO4
Note that only GPIO1 is a dedicated GPIO pin; the other pins are shared with Control Interface
functions. The pins available for GPIO function depend on the selected Control Interface mode, as
described in Table 62.
CONTROL INTERFACE MODE
2-wire (I2C)
3-wire (SPI)
4-wire (SPI)
Table 62 GPIO Pin Availability
GPIO1
GPIO1
GPIO1
GPIO PIN AVAILABILITY
GPIO2
GPIO3
GPIO3
GPIO3
GPIO4
GPIO4
Note that CIFMODE/GPIO3 pin selects between I2C and SPI Control Interface modes (see “Control
Interface”). To enable GPIO functions on GPIO3, the MODE_GPIO register bit must be set in order
to disconnect this pin from the Control Interface circuit. Setting the MODE_GPIO register bit causes
the Control Interface mode selection to be latched; it will remain latched until a Software Reset or
Power On Reset occurs.
The register fields that control the GPIO pins are described in Table 63.
For each GPIO, the selected function is determined by the GPn_FN field, where n identifies the
GPIO pin (1 to 4). The pin direction, set by GPn_DIR, must be set according to function selected by
GPn_SEL.
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PD, May 2011, Rev 4.1
97