WM8948 Datasheet, PDF (124/189 Pages) Wolfson Microelectronics plc – Stereo Low-Power CODEC with Video Buffer and Touch Panel Controller

WM8948
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
4 SPKL_MIX_MU
1
Left Speaker PGA Mixer Mute
TE
0 = Disable Mute
1 = Enable Mute
3 SPKR_MIX_EN
0
Right speaker output mixer enable
A
0 = Disabled
1 = Enabled
2 SPKL_MIX_EN
0
Left speaker output mixer enable
A
0 = Disabled
1 = Enabled
1
DACR_ENA
0
Right DAC Enable
0 = Disabled
1 = Enabled
DACR_ENA must be set to 1 when processing right
channel data from the DAC or Digital Beep Generator.
0
DACL_ENA
0
Left DAC Enable
0 = Disabled
1 = Enabled
DACR_ENA must be set to 1 when processing left
channel data from the DAC or Digital Beep Generator.
Register 03h Power management 2
Production Data
REFER TO
REGISTER
ADDRESS
R4 (04h)
Audio
Interface
BIT
15:14
13:12
11:10
9
8
7
6
5
LABEL
DEFAULT
DESCRIPTION
DACDATA_PU
00
DACDAT pull-up / pull-down Enable
LL[1:0]
00 = no pull-up or pull-down
01 = pull-down
10 = pull-up
11 = reserved
FRAME_PULL
00
LRCLK pull-up / pull-down Enable
[1:0]
00 = no pull-up or pull-down
01 = pull-down
10 = pull-up
11 = reserved
BCLK_PULL
[1:0]
00
BCLK pull-up / pull-down Enable
00 = no pull-up or pull-down
01 = pull-down
10 = pull-up
11 = reserved
ADCR_SRC
1
Right Digital Audio interface source
0 = Left ADC data is output on right channel
1 = Right ADC data is output on right channel
ADCL_SRC
0
Left Digital Audio interface source
0 = Left ADC data is output on left channel
1 = Right ADC data is output on left channel
DACR_SRC
1
Right DAC Data Source Select
0 = Right DAC outputs left interface data
1 = Right DAC outputs right interface data
DACL_SRC
0
Left DAC Data Source Select
0 = Left DAC outputs left interface data
1 = Left DAC outputs right interface data
BCLK_INV
0
BCLK Invert
0 = BCLK not inverted
1 = BCLK inverted
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REFER TO
PD, May 2011, Rev 4.1
124