WM8351 Datasheet, PDF (57/330 Pages) Wolfson Microelectronics plc – Wolfson AudioPlus™ Stereo CODEC with Power Management

Production Data
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
WM8351
DESCRIPTION
7:4 FLL_RSP_RAT
E
0000
111 = Reserved
FLL Loop Gain
0000 = x 1 (Recommended value)
0001 = x 2
0010 = x 4
0011 = x 8
0100 = x 16
0101 = x 32
0110 = x 64
0111 = x 128
1000 = x 256
2:0 FLL_RATE
[2:0]
Recommended that these are not
changed from default.
000
Frequency of the FLL control block
000 = F_VCO / 1 (Recommended value)
001 = FVCO / 2
010 = F_VCO / 4
011 = FVCO / 8
100 = F_VCO / 16
101 = FVCO / 32
R43 (2Bh)
FLL Control
2
15:11 FLL_RATIO
[4:0]
R44 (2Ch)
FLL Control
3
R45 (2Dh)
FLL Control
4
9:0 FLL_N [9:0]
15:0 FLL_K [15:0]
7
FLL_REF_FRE
Q
5
FLL_FRAC
14
(0Eh)
086h
C226h
0
0
Recommended that these are not
changed from default.
CLK_VCO is divided by this integer, valid
from 1 .. 31.
1 recommended for high freq reference
8 recommended for low freq reference
FLL integer multiplier N for CLK_REF
FLL fractional multiplier K for CLK_REF.
This is only used if FLL_FRAC is set.
Low frequency reference locking
0 = High frequency reference locking
(recommended for reference clock >
48kHz)
1 = Lock frequency reference locking
(recommended for reference clock <=
48kHz)
Fractional enable
0 = Integer Mode
1 = Fractional Mode
1:0 FLL_CLK_SRC
00
[1:0]
Table 17 FLL Control Registers
1 recommended in all cases
Select FLL input clock Source
00 = MCLK
01 = DACLRCLK
10 = ADCLRCLK
11 = CLK_32K_REF
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PD, April 2012, Rev 4.5
57