WM8351 Datasheet, PDF (193/330 Pages) Wolfson Microelectronics plc – Wolfson AudioPlus™ Stereo CODEC with Power Management

Production Data
WM8351
The applicable register bits are defined in Table 135.
ADDRESS
R12 (0Ch)
Power
Mgmt (5)
R218 (DAh)
RTC Tick
Control
BIT
LABEL
DEFAULT
DESCRIPTION
11 RTC_TICK_ENA
1
Enable RTC counting (instruction only)
0 = disabled
1 = enabled
15
Protected by security key.
14 RTC_TICKSTS
0
Status of tick request. This bit can be used
to ensure the RTC is using the value of
RTC_TICK_ENA.
0 = disabled
1 = enabled
Protected by security key.
9:0 RTC_TRIM [9:0] 00_0000_ RTC frequency trim. Used to adjust the
0000
count value of the Tick Gen block to
compensate for crystal inaccuracies.
RTC frequency trim is a 10bit fixed point
<4,6> 2's complement number. MSB
Scaling = -8Hz. The register indicates the
error (in Hz) with respect to the ideal
32768Hz) of the input crystal frequency.
e.g.:
Actual crystal freq: 32769.00Hz:
Required trim 0xb0001_000000
(+1.000000)
Actual crystal freq: 32767.00Hz:
Required trim 0xb1111_000000 (-
1.000000)
Actual crystal freq: 32775.58Hz:
Required trim 0xb0111_100101
(+7.578125)
Actual crystal freq: 32763.78Hz:
Required trim 0xb1011_110010 (-
4.218750)
Protected by security key.
Note: RTC_TICK_ENA can be accessed through R12 or through R218. Reading from or writing to
either register location has the same effect.
Table 135 Controlling the RTC Frequency Trim
22.4 RTC GPIO OUTPUT
It is possible to configure GPIO6 as an RTC output, as described in Section 20. This output is a
square wave that is derived from the trimmed RTC counter. The frequency can be set to values
between 1Hz and 16.384kHz, as described in Table 136.
Note that, when RTC_TRIM is used to calibrate the crystal oscillator, the nominal 50% duty ratio of
this output may deviate by up to 8 clock periods of the 32.768kHz oscillator on the occasions when
the RTC Seconds Counter is increased (ie. once per second).
w
PD, April 2012, Rev 4.5
193