WM8994 Datasheet, PDF (291/359 Pages) Wolfson Microelectronics plc – Multi-Channel Audio Hub CODEC for Smartphones

Production Data
WM8994
REGISTER BIT
LABEL
DEFAULT
DESCRIPTION
ADDRESS
R787
(0313h)
AIF2 BCLK
8:4 AIF2_BCLK_DI 0_0100 BCLK2 Rate
V [4:0]
00000 = AIF2CLK
00001 = AIF2CLK / 1.5
00010 = AIF2CLK / 2
00011 = AIF2CLK / 3
00100 = AIF2CLK / 4
00101 = AIF2CLK / 5
00110 = AIF2CLK / 6
00111 = AIF2CLK / 8
01000 = AIF2CLK / 11
01001 = AIF2CLK / 12
01010 = AIF2CLK / 16
01011 = AIF2CLK / 22
01100 = AIF2CLK / 24
01101 = AIF2CLK / 32
01110 = AIF2CLK / 44
01111 = AIF2CLK / 48
10000 = AIF2CLK / 64
10001 = AIF2CLK / 88
10010 = AIF2CLK / 96
10011 = AIF2CLK / 128
10100 = AIF2CLK / 176
10101 = AIF2CLK / 192
10110 - 11111 = Reserved
Register 0313h AIF2 BCLK
REFER TO
REGISTER
ADDRESS
R788
(0314h)
AIF2ADC
LRCLK
BIT
LABEL
DEFAULT
DESCRIPTION
11 AIF2ADC_LRC
0
Allows ADCLRCLK2 to be enabled in Slave mode
LK_DIR
0 = Normal
1 = ADCLRCLK2 enabled in Slave mode
10:0 AIF2ADC_RAT 000_0100_ ADCLRCLK2 Rate
E [10:0]
0000 _{ADCLRCLK2 clock output =}
BCLK2 / AIF2ADC_RATE
Register 0314h AIF2ADC LRCLK
Integer (LSB = 1)
Valid from 8..2047
REFER TO
REGISTER
ADDRESS
R789
(0315h)
AIF2DAC
LRCLK
BIT
LABEL
DEFAULT
DESCRIPTION
11 AIF2DAC_LRC
0
Allows LRCLK2 to be enabled in Slave mode
LK_DIR
0 = Normal
1 = LRCLK2 enabled in Slave mode
10:0 AIF2DAC_RAT 000_0100_ LRCLK2 Rate
E [10:0]
0000 _{LRCLK2 clock output =}
BCLK2 / AIF2DAC_RATE
Register 0315h AIF2DAC LRCLK
w
Integer (LSB = 1)
Valid from 8..2047
REFER TO
PD, April 2012, Rev 4.4
291