WM8994 Datasheet, PDF (285/359 Pages) Wolfson Microelectronics plc – Multi-Channel Audio Hub CODEC for Smartphones

Production Data
WM8994
REGISTER
ADDRESS
R580
(0244h)
FLL2
Control (5)
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
12:7 FLL2_FRC_NC 01_1001 FLL2 Forced oscillator value
O_VAL [5:0]
Valid range is 000000 to 111111
0x19h (011001) = 12MHz approx
(Note that this field is required for free-running FLL
modes only)
6 FLL2_FRC_NC
0
FLL2 Forced control select
O
0 = Normal
1 = FLL2 oscillator controlled by FLL2_FRC_NCO_VAL
(Note that this field is required for free-running FLL
modes only)
4:3 FLL2_REFCLK
00
FLL2 Clock Reference Divider
_DIV [1:0]
00 = MCLK / 1
01 = MCLK / 2
10 = MCLK / 4
11 = MCLK / 8
MCLK (or other input reference) must be divided down
to <=13.5MHz.
For lower power operation, the reference clock can be
divided down further if desired.
1:0 FLL2_REFCLK
00
FLL2 Clock source
_SRC [1:0]
00 = MCLK1
01 = MCLK2
10 = LRCLK2
11 = BCLK2
Register 0244h FLL2 Control (5)
REGISTER BIT
LABEL
DEFAULT
DESCRIPTION
ADDRESS
R768
15 AIF1ADCL_SR
0
AIF1 Left Digital Audio interface source
(0300h)
C
0 = Left ADC data is output on left channel
AIF1 Control
(1)
14 AIF1ADCR_SR
1
1 = Right ADC data is output on left channel
AIF1 Right Digital Audio interface source
C
0 = Left ADC data is output on right channel
1 = Right ADC data is output on right channel
13 AIF1ADC_TDM
0
AIF1 transmit (ADC) TDM Control
0 = ADCDAT1 drives logic ‘0’ when not transmitting
data
1 = ADCDAT1 is tri-stated when not transmitting data
8 AIF1_BCLK_IN
0
BCLK1 Invert
V
0 = BCLK1 not inverted
1 = BCLK1 inverted
Note that AIF1_BCLK_INV selects the BCLK1 polarity
in Master mode and in Slave mode.
7 AIF1_LRCLK_I
0
Right, left and I2S modes – LRCLK1 polarity
NV
0 = normal LRCLK1 polarity
1 = invert LRCLK1 polarity
Note that AIF1_LRCLK_INV selects the LRCLK1
polarity in Master mode and in Slave mode.
REFER TO
w
DSP Mode – mode A/B select
0 = MSB is available on 2nd BCLK1 rising edge after
LRCLK1 rising edge (mode A)
1 = MSB is available on 1st BCLK1 rising edge after
PD, April 2012, Rev 4.4
285