WM8994 Datasheet, PDF (286/359 Pages) Wolfson Microelectronics plc – Multi-Channel Audio Hub CODEC for Smartphones

WM8994
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
LRCLK1 rising edge (mode B)
6:5 AIF1_WL [1:0]
10
AIF1 Digital Audio Interface Word Length
00 = 16 bits
01 = 20 bits
10 = 24 bits
11 = 32 bits
Note - 8-bit modes can be selected using the
“Companding” control bits.
4:3 AIF1_FMT [1:0]
10
AIF1 Digital Audio Interface Format
00 = Right justified
01 = Left justified
10 = I2S Format
11 = DSP Mode
Register 0300h AIF1 Control (1)
Production Data
REFER TO
REGISTER
ADDRESS
R769
(0301h)
AIF1 Control
(2)
BIT
15
14
11:10
8
4
3
2
1
0
LABEL
DEFAULT
DESCRIPTION
AIF1DACL_SR
0
AIF1 Left Receive Data Source Select
C
0 = Left DAC receives left interface data
1 = Left DAC receives right interface data
AIF1DACR_SR
1
AIF1 Right Receive Data Source Select
C
0 = Right DAC receives left interface data
1 = Right DAC receives right interface data
AIF1DAC_BOO
00
AIF1 Input Path Boost
ST [1:0]
00 = 0dB
01 = +6dB (input must not exceed -6dBFS)
10 = +12dB (input must not exceed -12dBFS)
11 = +18dB (input must not exceed -18dBFS)
AIF1_MONO
0
AIF1 DSP Mono Mode
0 = Disabled
1 = Enabled
Note that Mono Mode is only supported when
AIF1_FMT = 11. The number of BCLK cycles per
LRCLK frame must be less the 2 x AIF1 Word Length.
AIF1DAC_CO
MP
0
AIF1 Receive Companding Enable
0 = Disabled
1 = Enabled
AIF1DAC_CO
MPMODE
0
AIF1 Receive Companding Type
0 = µ-law
1 = A-law
AIF1ADC_CO
MP
0
AIF1 Transmit Companding Enable
0 = Disabled
1 = Enabled
AIF1ADC_CO
MPMODE
0
AIF1 Transmit Companding Type
0 = µ-law
1 = A-law
AIF1_LOOPBA
0
AIF1 Digital Loopback Function
CK
0 = No loopback
1 = Loopback enabled (ADCDAT1 data output is
directly input to DACDAT1 data input).
Register 0301h AIF1 Control (2)
REFER TO
w
PD, April 2012, Rev 4.4
286