W78LE365_07 Datasheet, PDF (9/42 Pages) Winbond – 8-BIT MICROCONTROLLER

W78LE365/W78L365A
5.5 Reset
The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two
machine cycles while the oscillator is running. An internal trigger circuit in the reset line is used to
deglitch the reset line when the W78L365A is used with an external RC network. The reset logic also
has a special glitch removal circuit that ignores glitches on the reset line. During reset, the ports are
initialized to FFH, the stack pointer to 07H, PCON (with the exception of bit 4) to 00H, and all of the
other SFR registers except SBUF to 00H. SBUF is not reset.
5.5.1 W78L365A Special Function Registers (SFRs) and Reset Values
F8
+B
F0
00000000
E8
+ACC
E0
00000000
+P4
PWMP
PWM0
PWM1
PWMCON1
PWM2
D8
11111111 00000000 00000000 00000000 00000000 00000000
+PSW
D0
00000000
+T2CON
T2MOD
RCAP2L
RCAP2H
C8
00000000 00000000 00000000 00000000
+XICON
C0
00000000
P4CONA
00000000
P4CONB
00000000
+IP
B8
00000000
+P3
B0
00000000
+IE
A8
00000000
+P2
XRAMAH
A0
11111111 00000000
+SCON
SBUF
98
00000000 xxxxxxxx
+P1
90
11111111
+TCON
TMOD
TL0
TL1
88
00000000 00000000 00000000 00000000
+P0
SP
DPL
DPH
80
11111111 00000111 00000000 00000000
TL2
00000000
SFRAL
00000000
P43AL
00000000
P42AL
00000000
P41AL
00000000
TH0
00000000
P40AL
00000000
TH2
00000000
SFRAH
00000000
P43AH
00000000
P42AH
00000000
P41AH
00000000
TH1
00000000
P40AH
00000000
Notes:
1. The SFRs marked with a plus sign(+) are both byte- and bit-addressable.
2. The text of SFR with bold type characters are extension function registers.
CHPENR
00000000
PWM3
00000000
PWMCON2
00000000
SFRFD
00000000
P4CSIN
00000000
AUXR
00000000
POR
00000000
PWM4
00000000
SFRCN
00000000
CHPCON
0xx00000
WDTC
00000000
PCON
00110000
Publication Release Date: January 10, 2007
-9-
Revision A7