W78C354 Datasheet, PDF (7/44 Pages) Winbond – MONITOR MICROCONTROLLER

W78C354
FUNCTIONAL DESCRIPTION
The W78C354's core architecture consists of an 80C32 MCU surrounded by various special function
registers, or SFRs (some of these are 80C32 standard registers, while others are newly added; see
Table 1), three general purpose I/O ports (P1, P2, and P3), one output-only port (P4), 256 bytes of
scratchpad RAM, two timer/counters (Timer0 and Timer1) and one 80C32 standard serial port. The
processor supports 109 different instructions (without "MOVX A, @DPTR" and "MOVX @DPTR, A"),
which are all compatible with the 80C32 family instruction set.
There are two major differences between the W78C354 and 80C32. First, the W78C354 cannot
access an external program or data memory. This function is unnecessary, because the W78C354's
16 KB of internal ROM and 512 bytes of on-chip RAM should be enough for most monitor
applications. Second, the W78C354 has a number of new SFRs (see Table 2), which provide more
powerful functions.
Table 1. W78C354 special function registers (SFRs)
F8
F0
+B
E8
E0
+ ACC
D8
+ S1CON
S1STA
S1DAT
S1ADR
D0
+ PSW
C8 + CONTREG4
C0
B8
+ IP
B0
+ P3
A8
+ IE
A0
+ P2
98
+ SCON
90
+ P1
SBRM0
ADC
SDAC7
SDAC0
SBUF
AUTOLOAD
SBRM1
INTVECT
SDAC8
SDAC1
BSDAC0
DHREG
PORT4
STATUS
SDAC9
SDAC2
BSDAC1
DVREG
SOAREG
HFCOUNTL
SDAC10
SDAC3
WDTCLR
DDC1
88
+ TCON
80 + CONTREG1
TMOD
SP
TL0
TL1
TH0
DPL
DPH
CONTREG5
Notes:
1. SFRs with a "+" are both byte and bit-addressable.
2. The registers in the shaded region are newly added to the 80C32.
SOACLR
HFCOUNTH
SDAC11
SDAC4
DDAC0
INTMSK
TH1
CONTREG2
VFCOUNTL
SDAC12
SDAC5
DDAC1
BDDAC
PARAL
FF
F7
EF
E7
DF
D7
CF
C7
BF
VFCOUNTH B7
SDAC13 AF
SDAC6
A7
DDAC2
9F
DBRM
97
PARAH
8F
PCON
87
A. Memory Address Space
The W78C354 operates in three separate address spaces:
(1) The first (Figure 1-1) is the 16 KB internal program space (0000H−3FFFH).
(2) The second (Figure 1-2) is the data memory space, which is 256 bytes in size (0000H−00FFH).
The data memory is integrated inside the chip rather than outside the chip, as in a standard
80C32. This data memory space must be accessed by the "MOVX @Ri" instruction.
(3) The third (Figure 1-3) is the same as in the standard 80C32.
Publication Release Date: October 1996
-7-
Revision A1