W83782D Datasheet, PDF (68/73 Pages) Winbond – MONITORING IC

Preliminary W83782D
ISA Read/Write Timing
PARAMETER
Valid Address to Read Active
Valid Address to Write Active
Data Hold
Data Setup
Address Hold from Inactive Read
Read Cycle Update
Read Strobe Width
Read Data Hold
Read Strobe to Clear IRQ
Active Read to Valid Data
Address Hold from Inactive Write
Write Cycle Update
Write Strobe to Clear IRQ
Write Strobe Width
Read Cycle = t_AR + t_RD+t_RCV
Write Cycle = t_AW+t_WR - t_WCV
8.3.2 Serial Bus Timing Diagram
SYMBOL
t^-AR
t_AW
t_DH
t_DS
t_RA
t_RCU
t_RD
t_RDH
t_RI
t_RVD
t_WA
t_WCU
t_WI
t_WR
RC
WC
MIN.
10
10
5
80
40
200
120
40
5
80
120
210
210
MAX.
60
115
60
UNIT
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
SCL
SDA IN
t _HD;SDA
SDA OUT
t _SCL
t _HD;DAT
VALID DATA
t _SU;DAT
Serial Bus Timing Diagram
t _SU;STO
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