W25Q80BWSSIG-TR Datasheet, PDF (63/75 Pages) Winbond – 1.8V 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI

W25Q80BW
8.7 AC Electrical Characteristics (cont’d)
DESCRIPTION
SPEC
SYMBOL ALT
MIN TYP
MAX
UNIT
/HOLD Active Hold Time relative to CLK
tCHHH
5
ns
/HOLD Not Active Setup Time relative to CLK
tHHCH
5
ns
/HOLD Not Active Hold Time relative to CLK
/HOLD to Output Low-Z
/HOLD to Output High-Z
Write Protect Setup Time Before /CS Low
Write Protect Hold Time After /CS High
/CS High to Power-down Mode
/CS High to Standby Mode without Electronic Signature
Read
/CS High to Standby Mode with Electronic Signature
Read
/CS High to next Instruction after Suspend
tCHHL
5
tHHQX⁽²⁾ tLZ
tHLQZ⁽²⁾ tHZ
tWHSL⁽³⁾
20
tSHWL⁽³⁾
100
tDP⁽²⁾
tRES1⁽²⁾
tRES2⁽²⁾
tSUS⁽²⁾
ns
7
ns
12
ns
ns
ns
3
µs
30
µs
30
µs
20
µs
Write Status Register Time
tW
Byte Program Time (First Byte) ⁽⁴⁾
tBP1
Additional Byte Program Time (After First Byte) ⁽⁴⁾
tBP2
10
15
ms
30
50
µs
2.5
12
µs
Page Program Time
Sector Erase Time (4KB)
tPP
0.4
0.8
ms
tSE
30 200/400⁽⁵⁾ ms
Block Erase Time (32KB)
tBE1
120
800
ms
Block Erase Time (64KB)
tBE2
150 1,000
ms
Chip Erase Time
tCE
2
6
s
Notes:
1.
2.
3.
4.
5.
Clock high + Clock low must be less than or equal to 1/fC.
Value guaranteed by design and/or characterization, not 100% tested in production.
Only applicable as a constraint for a Write Status Register instruction when SRP0 bit is set to 1.
For multiple bytes after first byte within a page, tBPN = tBP1 + tBP2 * N (typical) and tBPN = tBP1 + tBP2 * N (max), where N =
number of bytes programmed.
Max Value tSE with <50K cycles is 200ms and >50K & <100K cycles is 400ms.
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Publication Release Date: September 01, 2014
Revision L