W77C58 Datasheet, PDF (6/71 Pages) Winbond – 8 BIT MICROCONTROLLER

Preliminary W77C58
Data Pointers
The original 8052 had only one 16-bit Data Pointer (DPL, DPH). In the W77C58, there is an additional
16-bit Data Pointer (DPL1, DPH1). This new Data Pointer uses two SFR locations where were unused
in the original 8052. In addition there is an added instruction, DEC DPTR (op-code A5H), which helps
in improving programming flexibility for the user.
Power Management
Like the standard 80C52, the W77C58 also has IDLE and POWER DOWN modes of operation. The
W77C58 provides a new Economy mode, which allows user to switch the internal clock rate divided
by 4, 64 or 1024. In the IDLE mode, the clock to the CPU core is stopped while the timers; serial ports
and interrupts clock continue to operate. In the POWER DOWN mode, the entire clock is stopped and
the chip operation is completely stopped. This is the lowest power consumption state.
On-chip Data SRAM
The W77C58 has 1K Bytes of data space SRAM that is read/write accessible and is memory mapped.
This on-chip MOVX SRAM is reached by the MOVX instruction. It is not used for executable program
memory. There is no conflict or overlap among the 256 bytes Scratchpad RAM and the 1K Bytes
MOVX SRAM as they use different addressing modes and separate instructions. Setting the DME0 bit
in the PMR register enables the on-chip MOVX SRAM. After a reset, the DME0 bit is cleared such
that the on-chip MOVX SRAM is disabled, and all data memory spaces 0000H−FFFFH access to the
external memory.
MEMORY ORGANIZATION
The W77C58 separates the memory into two separate sections, the Program Memory and the Data
Memory. The Program Memory is used to store the instruction op-codes, while the Data Memory is
used to store data or for memory mapped devices.
Program Memory
The Program Memory on the W77C58 can be up to 64K bytes long. All instructions are fetched for
execution from this memory area. The MOVC instruction can also access this memory region.
Data Memory
The W77C58 can access up to 32Kbytes of external Data Memory. This memory region is accessed
by the MOVX instructions. Unlike the 8051 derivatives, the W77C58 contains on-chip 1K bytes MOVX
SRAM of Data Memory, which can only be accessed by MOVX instructions. These 1K bytes of SRAM
are between address 0000H and 03FFH. Access to the on-chip MOVX SRAM is optional under
software control. When enabled by software, any MOVX instruction that uses this area will go to the
on-chip RAM. MOVX addresses greater than 03FFH automatically go to external memory through
Port 0 and 2. When disabled, the 1KB memory area is transparent to the system memory map. Any
MOVX directed to the space between 0000H and FFFFH goes to the expanded bus on Port 0 and 2.
This is the default condition. In addition, the W77C58 has the standard 256 bytes of on-chip
Scratchpad RAM. This can be accessed either by direct addressing or by indirect addressing. There
are also some Special Function Registers (SFRs), which can only be accessed by direct addressing.
Since the Scratchpad RAM is only 256 bytes, it can be used only when data contents are small. In the
event that larger data contents are present, two selections can be used. One is on-chip MOVX SRAM,
the other is the external Data Memory. The on-chip MOVX SRAM can only be accessed by a MOVX
instruction, the same as that for external Data Memory. However, the on-chip RAM has the fastest
access times.
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