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| W9725G6JB Datasheet, PDF (59/87 Pages) Winbond – 4M 4 BANKS 16 BIT DDR2 SDRAM | |||
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W9725G6JB
CLK
CLK
VDDQ
tIS
tIH
tIS
tIH
VIH(ac)min
VIH(dc)min
DC to VREF
region
VREF(dc)
VIL(dc)max
tangent
line
tangent
line
nominal
line
nominal DC to VREF
line
region
VIL(ac)max
VSS
ÎTR
ÎTF
Hold Slew Rate
Rising Signal
=
tangent line[VREF(dc) - VIL(ac)max]
ÎTR
Hold Slew Rate tangent line[VIH(dc)min - VREF(dc)]
Falling Signal =
ÎTF
Figure 23 â Illustration of tangent line for tIH
- 59 -
Publication Release Date: Nov. 29, 2011
Revision A02
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