W9725G6JB Datasheet, PDF (12/87 Pages) Winbond – 4M  4 BANKS  16 BIT DDR2 SDRAM

W9725G6JB
7.2.2.2 DLL Enable/Disable
The DLL must be enabled for normal operation. DLL enable is required during power-up initialization,
and upon returning to normal operation after having the DLL disabled. The DLL is automatically
disabled when entering Self Refresh operation and is automatically re-enabled and reset upon exit of
Self Refresh operation. Any time the DLL is enabled (and subsequently reset), 200 clock cycles must
occur before a Read command can be issued to allow time for the internal clock to be synchronized
with the external clock. Failing to wait for synchronization to occur may result in a violation of the tAC
or tDQSCK parameters.
BA1 BA0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Address Field
0
1 Qoff 0*¹ _DQS OCD program Rtt AdditivWe LRatenBcTy Rtt D.I.C DLL Extended Mode Register (1)
BA1 BA0
00
01
10
11
MRS mode
MR
EMR (1)
EMR (2)
EMR (3)
A6 A2 Rtt (nominal)
0 0 ODT Disabled
0 1 75 ohm
1 0 150 ohm
1
1
50 ohm*²
A0 DLL Enable
0
Enable
1
Disable
Driver impedance adjustment
A9 A8 A7 OCD Calibration Program
0 0 0 OCD calibration mode exit; matain setting
0 0 1 Drive (1)
0 1 0 Drive (0)
1 0 0 Adjust mode*³
1 1 1 OCD Calibration default*⁴
A12
Qoff (Optional)*⁵
0 Output buffer enabled
1 Output buffer disabled
A10
DQS
0
Enable
1
Disable
A10
Strobe Function Matrix
(DQS Enable) _DQS
DQS
0 (Enable)
DQS
DQS
1 (Disable)
DQS
Hi-z
Additive Latency
A5 A4 A3 Latency
000
0
001
1
010
2
011
3
100
4
101
5
110
6
1 1 1 Reserved
Output Driver Impedance Control
Output driver
A1 _{impedance control}
Driver
size
0
Normal
100%
1
Reduced
60%
Notes:
1. A11 default is “0” RDQS disabled.
2. Optional for DDR2-667, mandatory for DDR2-800 and DDR2-1066.
3. When Adjust mode is issued, AL from previously set value must be applied.
4. After setting to default, OCD calibration mode needs to be exited by setting A9-A7 to 000. Refer to the section 7.2.3 for
detailed information.
5. Output disabled - DQs, LDQS, LDQS , UDQS, UDQS . This feature is used in conjunction with DIMM IDD measurements
when IDDQ is not desired to be included.
Figure 3 – EMR (1)
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Publication Release Date: Nov. 29, 2011
Revision A02