W83176R-732 Datasheet, PDF (5/11 Pages) Winbond – WINBOND 2DIMM DDR ZERO DELAY BUFFER FOR SIS CHIPSET

W83176R-732
5.1 Clock Outputs
PIN
27, 25, 16,
14, 5, 1
26, 24, 17,
13, 4, 2
PIN NAME
CLKC [5:0]
CLKT [5:0]
22
SDATA *
7
8
9, 18, 21
19
SCLK *
CLK_INT
N/C
FB_OUTT
20
FB_INT
TYPE
DESCRIPTION
OUT Complementary Clocks of differential pair outputs
OUT True Clocks of differential pair outputs
I/O
IN
IN
NC
OUT
IN
Serial data of I²C 2-wire control interface
Internal pull-up resistor 120K to VDD
Serial clock of I²C 2-wire control interface
Internal pull-up resistor 120K to VDD
True reference clock input, 3.3V tolerant input
Not connected
True Feedback output, dedicated for external feedback.
It switches at the same frequency as the CLK. This
output must be wired to FB_INT.
True Feedback input, provides feedback signal to the
internal PLL for synchronization with CLK_INT to
eliminate phase error.
5.2 Power Pins
PIN
6, 11, 15, 28
3, 12, 23
10
PIN NAME
GND
VDD
AVDD
DESCRIPTION
Ground
Power supply 2.5V
Analog power supply, 2.5V
Publication Release Date: April 13, 2005
-3-
Revision 1.1