W83176R-732 Datasheet, PDF (3/11 Pages) Winbond – WINBOND 2DIMM DDR ZERO DELAY BUFFER FOR SIS CHIPSET

W83176R-732
1. GENERAL DESCRIPTION
The W83176R-732 is a 2.5V Zero-delay D.D.R. Clock buffer designed for SiS chipset. W83176R-732
can support 2 D.D.R. DRAM DIMMs.
The W83176R-732 provides I²C serial bus interface to program the registers to enable or disable each
clock outputs. The W83176R-732 accepts a reference clock as its input and runs on 2.5V supply.
2. FEATURES
• Zero-delay clock outputs
• Feedback pins for synchronous
• Supports up to 2 D.D.R. DIMMs
• One pairs of additional outputs for feedback
• Low Skew outputs (< 100 pS)
• Supports 400 MHz D.D.R. SDRAM
• ²C 2-Wire serial interface and supports Byte or Block Date RW
• Packaged in 28-pin SSOP
3. PIN CONFIGURATION
*: Internal pull-up resistor 120K to VDD
Publication Release Date: April 13, 2005
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Revision 1.1