W24L11 Datasheet, PDF (5/11 Pages) Winbond – 128K X 8 High Speed CMOS Static RAM

TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
Address
DOUT
Preliminary W24L11
TRC
TAA
TOH
TOH
Read Cycle 2
(Chip Select Controlled)
CS1
CS2
D_OUT
TCLZ
TACS
TCHZ
Read Cycle 3
(Output Enable Controlled)
Address
OE
CS1
CS2
DOUT
T RC
TAA
TAOE
TOLZ
TACS
TCLZ
TOH
TOHZ
TCHZ
Publication Release Date: October 1999
-5-
Revision A1