W956D6HB Datasheet, PDF (47/57 Pages) Winbond – Low-power features

W956D6HB
10.2.12 Burst WRITE Operation—Variable Latency Mode
64Mb Async./Burst/Sync./A/D MUX
tCLK
tKP
t KP
t KHKL
VIH
CLK
VIL
tSP tHD
VIH
A[max:16]
VIL
t AS³
Valid address
VIH
ADV#
VIL
VIH
LB # /UB #
VIL
t AS³
tSP tHD
VIH
CE #
VIL
tCSP
tSP tHD
t CEM
tHD tCBPH
Note 4
OE# ^VIH
VIL
tSP tHD
VIH
WE#
VIL
tAS ³
tSP tHD
VIH VIH
A/DQ[15:0 ]
VIL ^VIL
VOH
WAIT
VOL
Valid
address
t KHTL
High - Z
tSP t HD
D1
D2
tKHTL
Note 2
t KOH
D3
D0
tHZ
High - Z
WRITE burst identified
(WE #= LOW )
Undefined
Don' t Care
Notes: 1. Non-default BCR settings for burst WRITE operation in variable latency mode: latency code 2 (3 clocks), WAIT active
LOW, WAIT asserted during delay, burst length 4, burst wrap enabled.
2. WAIT asserts for LC cycles for both fixed and variable latency. LC = latency code (BCR[13:11]).
3. tAS is required if tCSP > 20ns.
4. CE# must go HIGH before any clock edge following the last word of a defined-length burst.
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Publication Release Date : May 29,2013
Revision : A01-003