W956D6HB Datasheet, PDF (18/57 Pages) Winbond – Low-power features

W956D6HB
64Mb Async./Burst/Sync./A/D MUX
8.4.1.2 Configuration Register WRITE Synchronous Mode Followed by READ Operation
CLK
A [max :16]
(except A[19:18])
A[19:18] ²
CRE
ADV#
CE #
Latch control register value
OPCODE
tHD
tSP
Latch control register address
t SP
Address
Address
tHD
tSP
tHD
t CSP
Notes 3
t _CBPH
OE#
WE#
LB#/UB#
tSP
t HD
A/DQ [15:0]
WAIT
OPCODE
t KHTL
High-z
Address
Valid
Data
High Z
Don ’t Care
Notes: 1. Non-default BCR settings for synchronous mode configuration register WRITE followed by READ ARRAY operation:
latency code 2 (3 clocks), WAIT active LOW, WAIT asserted during delay.
2. A[19:18] = 00b to load RCR, and 10b to load BCR.
3. CE# must remain LOW to complete a burst-of-one WRITE. WAIT must be monitored—additional WAIT cycles caused by
refresh collisions require a corresponding number of additional CE# LOW cycles.
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Publication Release Date : May 29,2013
Revision : A01-003