W77LE58_07 Datasheet, PDF (45/82 Pages) Winbond – 8-BIT MICROCONTROLLER

W77LE58/W77L058A
6.5 Reset State
Most of the SFRs and registers on the device will go to the same condition in the reset state. The
Program Counter is forced to 0000h and is held there as long as the reset condition is applied.
However, the reset state does not affect the on-chip RAM. The data in the RAM will be preserved
during the reset. However, the stack pointer is reset to 07h, and therefore the stack contents will be
lost. The RAM contents will be lost if the VDD falls below approximately 2V, as this is the minimum
voltage level required for the RAM to operate normally. Therefore after a first time power on reset the
RAM contents will be indeterminate. During a power fail condition, if the power falls below 2V, the
RAM contents are lost.
After a reset most SFRs are cleared. Interrupts and Timers are disabled. The Watchdog timer is
disabled if the reset source was a POR. The port SFRs have FFh written into them which puts the port
pins in a high state. Port 0 floats as it does not have on-chip pull-ups.
Table 6. SFR Reset Value
SFR NAME
RESET VALUE
P0
SP
DPL
DPH
DPL1
DPH1
DPS
PCON
TCON
TMOD
TL0
TL1
TH0
TH1
CKCON
11111111b
00000111b
00000000b
00000000b
00000000b
00000000b
00000000b
00xx0000b
00000000b
00000000b
00000000b
00000000b
00000000b
00000000b
00000001b
P1
11111111b
SCON
SBUF
P2
SADDR1
00000000b
xxxxxxxxb
11111111b
00000000b
SCON1
00000000b
ROMMAP
EXIF
P4
01xxx110b
0000xxx0b
xxxx1111b
SFR NAME
IE
SADDR
P3
IP
SADEN
T2CON
T2MOD
RCAP2L
RCAP2H
TL2
TH2
TA
PSW
WDCON
ACC
EIE
B
EIP
PC
SADEN1
SBUF1
PMR
STATUS
RESET VALUE
00000000b
00000000b
11111111b
x0000000b
00000000b
00000000b
00000x00b
00000000b
00000000b
00000000b
00000000b
11111111b
00000000b
0x0x0xx0b
00000000b
xxx00000b
00000000b
xxx00000b
00000000b
00000000b
xxxxxxxxb
010xx0x0b
000x0000b
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Publication Release Date: February 1, 2007
Revision A7