W742C813 Datasheet, PDF (42/56 Pages) Winbond – 4 BIT MICROCONTROLLER

W742E/C813
Table 6 The reation between the LCDR and segment/common pins used as LCD drive output
pins
OUTPUT
PIN
SEG0
SEG1
:
:
SEG38
SEG39
OUTPUT
PIN
SEG0
SEG1
:
:
SEG38
SEG39
LCD
RAM
LCDR01
LCDR03
:
:
LCDR4D
LCDR4F
LCD
RAM
LCDR81
LCDR83
:
:
LCDRCD
LCDRCF
COM7
BIT3
0/1
0/1
:
:
0/1
0/1
COM15
BIT3
0/1
0/1
:
:
0/1
0/1
COM6
BIT2
0/1
0/1
:
:
0/1
0/1
COM14
BIT2
0/1
0/1
:
:
0/1
0/1
COM5
BIT1
0/1
0/1
:
:
0/1
0/1
COM13
BIT1
0/1
0/1
:
:
0/1
0/1
COM4
BIT0
0/1
0/1
:
:
0/1
0/1
COM12
BIT0
0/1
0/1
:
:
0/1
0/1
LCD
RAM
LCDR00
LCDR02
:
:
LCDR4C
LCDR4E
LCD
RAM
LCDR80
LCDR82
:
:
LCDRCC
LCDRCE
COM3
BIT3
0/1
0/1
:
:
0/1
0/1
COM2
BIT2
0/1
0/1
:
:
0/1
0/1
COM11
BIT3
0/1
0/1
:
:
0/1
0/1
COM10
BIT2
0/1
0/1
:
:
0/1
0/1
COM1
BIT1
0/1
0/1
:
:
0/1
0/1
COM9
BIT1
0/1
0/1
:
:
0/1
0/1
COM0
BIT0
0/1
0/1
:
:
0/1
0/1
COM8
BIT0
0/1
0/1
:
:
0/1
0/1
The LCDON instruction turns the LCD display on (even in HOLD mode), and the LCDOFF instruction
turns the LCD display off. At the initial reset state, the LCD display is turned off automatically. To turn
on the LCD display, the instruction LCDON must be executed.
5.25.1 LCD RAM Addressing Method
There are 160 LCD RAMs (LCDR00H − LCDR4FH, LCDR80H − LCDR0CFH) that should be indirectly
addressed. The LCD RAM pointer (LP) is used to point to the address of the wanted LCD RAM but it
is not readable. The LP is organized as 8-bit binary register. The MOV LPL,R and MOV LPH,R
instructions can load the LCD RAM address from RAM to the LP register. The MOV @LP,R and MOV
R,@LP instructions can access the pointed LCD RAM content.
5.25.2 LCD Voltage and Contrast Adjusting
LCD power (VLCD2) has two source, one is directly from the VLCD1 pin, another is from internal pump
circuit. The LCD power source is selected by mask option. The pump circuit doubles the µC input
voltage (VDD), the power consumption in internal pump mode is more than directly input from VLCD1.
The LCD pump circuit only works in the VDD range from 2.4V to 4.0V. If the operating voltage of VDD is
up 4.0V, the LCD power should come from the VLCD1 pin. The LCD contrast is adjustable by an
internal variable resistor (VR). VLCD voltage is controlled by setting bit2, bit1 and bit0 of LCD contrast
control register (LCDCC). LCDCC is determined by executing MOV LCDCC,#I. The Figure 5-18 shows
the LDC power control as below:
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