W742C813 Datasheet, PDF (29/56 Pages) Winbond – 4 BIT MICROCONTROLLER

W742E/C813
Table 3 The initial state after the reset function is executed
Program Counter (PC)
TM0, TM1
MR0, MR1, PAGE Registers
PSR0, PSR1, PSR2, SCR Registers
IEF, HEF, HEFD, HCF, PEF, P1EF, EVF, EVFD, SEF flags
WRP, DBKR Register
Timer 0 Input Clock
Timer 1 Input Clock
MFP Output
DTMF Output
Input/Output Ports RA, RB, P0
Output Port RE & RF
RA, RB & P0 Ports Output Type
RC, RD Ports Pull-high Resistors
Input Clock of the Watchdog Timer
LCD Display
000H
Reset
Reset
Reset
Reset
Reset
FOSC/4
FOSC
Low
Hi-Z
Input mode
High
CMOS type
Disable
FOSC/1024
OFF
5.17 Input/Output Ports RA, RB & P0
Port RA consists of pins RA.0 to RA.3. Port RB consists of pins RB.0 to RB.3. Port P0 consists of pins
P0.0 to P0.3. At initial reset, input/output ports RA, RB and P0 are all in input mode. When RA and RB
are used as output ports, CMOS or NMOS open drain output type can be selected by the PM0 register.
But when P0 is used as output port, the output type is just fixed to be CMOS output type. Each pin of
port RA, RB and P0 can be specified as input or output mode independently by the PM1, PM2 and
PM6 registers. The MOVA R, RA or MOVA R, RB or MOVA R, P0 instructions operate the input
functions and the MOV RA, R or MOV RB, R or MOV P0, R operate the output functions. For more
detail port structure, refer to the and Figure 5-10 and Figure 5-10.
DATA
BUS
Input/Output Pin of the RA(RB)
PM0.0(PM0.1)
Output
Buffer
Enable
PM1.n (PM2.n)
MOV RA,R(MOV RB,R)
instruction
Enable
MOVA R,RA(MOVA R,RB) instruction
Figure 5-10 Architecture of RA (RB) Input/Output Pins
I/O PIN
RA.n(RB.n)
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Publication Release Date: December 2000
Revision A1