W25Q64BV Datasheet, PDF (42/61 Pages) Winbond – 64M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI

W25Q64BV
11.2.24 High Performance Mode (A3h)
The High Performance Mode (HPM) instruction must be executed prior to Dual or Quad I/O instructions
when operating at high frequencies (see FR and FR1 in AC Electrical Characteristics). This instruction
allows pre-charging of internal charge pumps so the voltages required for accessing the Flash memory
array are readily available. The instruction sequence includes the A3h instruction code followed by three
dummy byte clocks shown in Fig. 24. After the HPM instruction is executed, the device will maintain a
slightly higher standby current (Icc3) than standard SPI operation. The Release from Power-down or
HPM instruction (ABh) can be used to return to standard SPI standby current (Icc1). In addition, Write
Enable instruction (06h) and Power Down instruction (B9h) will also release the device from HPM mode
back to standard SPI standby state.
Figure 24. High Performance Mode Instruction Sequence
11.2.25 Release Power-down or High Performance Mode / Device ID (ABh)
The Release from Power-down or High performance Mode / Device ID instruction is a multi-purpose
instruction. It can be used to release the device from the power-down state or High Performance Mode,
or obtain the devices electronic identification (ID) number.
To release the device from the power-down state or High Performance Mode, the instruction is issued by
driving the /CS pin low, shifting the instruction code “ABh” and driving /CS high as shown in figure 25.
Release from power-down will take the time duration of tRES1 (See AC Characteristics) before the device
will resume normal operation and other instructions are accepted. The /CS pin must remain high during
the tRES1 time duration.
When used only to obtain the Device ID while not in the power-down state, the instruction is initiated by
driving the /CS pin low and shifting the instruction code “ABh” followed by 3-dummy bytes. The Device ID
bits are then shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in figure
26. The Device ID values for the W25Q64BV is listed in Manufacturer and Device Identification table. The
Device ID can be read continuously. The instruction is completed by driving /CS high.
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