W25Q64BV Datasheet, PDF (2/61 Pages) Winbond – 64M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI

W25Q64BV
Table of Contents
1. GENERAL DESCRIPTION ............................................................................................................... 5
2. FEATURES....................................................................................................................................... 5
3.
PIN CONFIGURATION SOIC 208-MIL ............................................................................................ 6
4.
PAD CONFIGURATION WSON 8X6-MM ........................................................................................ 6
5.
PAD CONFIGURATION PDIP 300-MIL ........................................................................................... 7
6. PIN DESCRIPTION SOIC 208-MIL, PDIP 300-MIL AND WSON 8X6-MM...................................... 7
7.
PIN CONFIGURATION SOIC 300-MIL ............................................................................................ 8
8. PIN DESCRIPTION SOIC 300-MIL .................................................................................................. 8
8.1 Package Types..................................................................................................................... 9
8.2 Chip Select (/CS).................................................................................................................. 9
8.3 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) .................................... 9
8.4 Write Protect (/WP)............................................................................................................... 9
8.5 HOLD (/HOLD) ..................................................................................................................... 9
8.6 Serial Clock (CLK) ................................................................................................................ 9
9. BLOCK DIAGRAM.......................................................................................................................... 10
10. FUNCTIONAL DESCRIPTION ....................................................................................................... 11
10.1
SPI OPERATIONS ............................................................................................................. 11
10.1.1 Standard SPI Instructions...................................................................................................11
10.1.2 Dual SPI Instructions ..........................................................................................................11
10.1.3 Quad SPI Instructions.........................................................................................................11
10.1.4 Hold Function .....................................................................................................................11
10.2 WRITE PROTECTION ....................................................................................................... 12
10.2.1 Write Protect Features........................................................................................................12
11. CONTROL AND STATUS REGISTERS ........................................................................................ 13
11.1
STATUS REGISTER .......................................................................................................... 13
11.1.1 BUSY..................................................................................................................................13
11.1.2 Write Enable Latch (WEL) ..................................................................................................13
11.1.3 Block Protect Bits (BP2, BP1, BP0)....................................................................................13
11.1.4 Top/Bottom Block Protect (TB)...........................................................................................13
11.1.5 Sector/Block Protect (SEC) ................................................................................................13
11.1.6 Status Register Protect (SRP1, SRP0)...............................................................................14
11.1.7 Quad Enable (QE) ..............................................................................................................14
11.1.8 Status Register Memory Protection ....................................................................................16
11.2
INSTRUCTIONS................................................................................................................. 17
11.2.1 Manufacturer and Device Identification ..............................................................................17
11.2.2 Instruction Set Table 1........................................................................................................18
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