W9712G6JB Datasheet, PDF (39/86 Pages) Winbond – 2M × 4 BANKS × 16 BIT DDR2 SDRAM

W9712G6JB
9.7 Capacitance
SYM.
PARAMETER
CCK
Input Capacitance , CLK and CLK
CDCK
CI
CDI
CIO
CDIO
Input Capacitance delta , CLK and CLK
input Capacitance, all other input-only pins
Input Capacitance delta, all other input-only pins
Input/output Capacitance, DQ, LDM, UDM, LDQS,
LDQS , UDQS, UDQS
Input/output Capacitance delta, DQ, LDM, UDM,
LDQS, LDQS , UDQS, UDQS
MIN.
1.0
−
1.0
−
2.5
−
MAX.
2.0
0.25
1.75
0.25
3.5
0.5
UNIT
pF
pF
pF
pF
pF
pF
9.8 Leakage and Output Buffer Characteristics
SYM.
IIL
IOL
VOH
VOL
IOH(dc)
PARAMETER
Input Leakage Current
(0V≦VIN≦VDD)
Output Leakage Current
(Output disabled, 0V≦VOUT≦VDDQ)
Minimum Required Output Pull-up
Maximum Required Output Pull-down
Output Minimum Source DC Current
MIN.
-2
MAX.
2
-5
5
VTT + 0.603
−
-13.4
−
VTT - 0.603
−
UNIT
µA
µA
V
V
mA
NOTES
1
2
3, 5
IOL(dc) Output Minimum Sink DC Current
13.4
−
mA
4, 5
Notes:
1. All other pins not under test = 0 V.
2. DQ, LDQS, LDQS , UDQS, UDQS are disabled and ODT is turned off.
3. VDDQ = 1.7 V; VOUT = 1.42 V. (VOUT - VDDQ)/IOH must be less than 21 Ω for values of VOUT between VDDQ and VDDQ -
0.28V.
4. VDDQ = 1.7 V; VOUT = 0.28V. VOUT/IOL must be less than 21 Ω for values of VOUT between 0 V and 0.28V.
5. The values of IOH(dc) and IOL(dc) are based on the conditions given in Notes 3 and 4. They are used to test drive current
capability to ensure VIHmin plus a noise margin and VILmax minus a noise margin are delivered to an SSTL_18 receiver.
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Publication Release Date: Mar. 15, 2010
Revision A01