W9864G6IH_10 Datasheet, PDF (3/44 Pages) Winbond – 1M × 4BANKS × 16BITS SDRAM

W9864G6IH
1. GENERAL DESCRIPTION
W9864G6IH is a high-speed synchronous dynamic random access memory (SDRAM), organized as
1M words × 4 banks × 16 bits. W9864G6IH delivers a data bandwidth of up to 200M words per second.
For different application, W9864G6IH is sorted into the following speed grades: -5/-6/-6I/-6A/-7 and -
7S. The -5 parts can run up to 200MHz/CL3. The -6/-6I/-6A parts can run up to 166MHz/CL3 (the -6I
industrial grade, -6A automotive grade which is guaranteed to support -40°C ~ 85°C). The -7/-7S parts
can run up to 143MHz/CL3 and with t_RP = 18nS.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be
accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE
command. Column addresses are automatically generated by the SDRAM internal counter in burst
operation. Random column read is also possible by providing its address at each clock cycle.
The multiple bank nature enables interleaving among internal banks to hide the precharging time.By
having a programmable Mode Register, the system can change burst length, latency cycle, interleave
or sequential burst to maximize its performance. W9864G6IH is ideal for main memory in high
performance applications.
2. FEATURES
• 3.3V± 0.3V for -5/-6/-6I/-6A speed grades power supply
• 2. 7V~3.6V for -7/-7S speed grades power supply
• 1,048,576 words × 4 banks × 16 bits organization
• Self Refresh Current: Standard and Low Power
• CAS Latency: 2 & 3
• Burst Length: 1, 2, 4, 8 and full page
• Sequential and Interleave Burst
• Byte data controlled by LDQM, UDQM
• Auto-precharge and controlled precharge
• Burst read, single write operation
• 4K refresh cycles/64mS
• Interface: LVTTL
• Packaged in TSOP II 54-pin, 400 mil using Lead free materials with RoHS compliant
Publication Release Date: Mar. 22, 2010
-3-
Revision A11