W9864G6IH_10 Datasheet, PDF (12/44 Pages) Winbond – 1M × 4BANKS × 16BITS SDRAM

W9864G6IH
8. OPERATION MODE
Fully synchronous operations are performed to latch the commands at the positive edges of CLK.
Table 1 shows the truth table for the operation commands.
Table 1 Truth Table (Note (1), (2))
COMMAND
Bank Active
Bank Precharge
Precharge All
Write
Write with Auto-precharge
Read
Read with Auto-precharge
Mode Register Set
No-Operation
Burst Stop
Device Deselect
Auto-Refresh
Self-Refresh Entry
Self Refresh Exit
Clock suspend Mode
Entry
Power Down Mode Entry
Clock Suspend Mode Exit
Power Down Mode Exit
Data write/Output Enable
Data write/Output Disable
DEVICE
STATE
Idle
Any
Any
Active ⁽³⁾
Active ⁽³⁾
Active ⁽³⁾
Active ⁽³⁾
Idle
Any
Active ⁽⁴⁾
Any
Idle
Idle
idle
(S.R)
Active
Idle
Active ⁽⁵⁾
Active
Any
(Power
Down)
Active
Active
A0-A9,
CKEn-1 CKEn DQM BS0, 1 A10
CS
A11
H
x
x
v
v
V
L
H
x
x
v
L
x
L
H
x
x
x
H
x
L
H
x
x
v
L
v
L
H
x
x
v
H
v
L
H
x
x
v
L
v
L
H
x
x
v
H
v
L
H
x
x
v
v
v
L
H
x
x
x
x
x
L
H
x
x
x
x
x
L
H
x
x
x
x
x
H
H
H
x
x
x
x
L
H
L
x
x
x
x
L
L
H
x
x
x
x
H
L
H
x
x
x
x
L
H
L
x
x
x
x
x
H
L
x
x
x
x
H
H
L
x
x
x
x
L
L
H
x
x
x
x
x
L
H
x
x
x
x
H
L
H
x
x
x
x
L
H
x
L
x
x
x
x
H
x
H
x
x
x
x
Notes:
(1) v = valid, x = Don't care, L = Low Level, H = High Level
(2) CKEn signal is input leve l when commands are provided.
(3) These are state of bank designated by BS0, BS1 signals.
(4) Device state is full page burst operation.
(5) Power Down Mode can not be entered in the burst cycle.
When this command asserts in the burst cycle, device state is clock suspend mode.
RAS CAS WE
L
H
H
L
H
L
L
H
L
H
L
L
H
L
L
H
L
H
H
L
H
L
L
L
H
HH
H
H
L
x
x
x
L
L
H
L
L
H
x
x
x
H
H
x
x
x
x
x
x
X
H
HH
x
x
X
x
x
X
H
HH
x
x
x
x
x
x
- 12 -
Publication Release Date: Mar. 22, 2010
Revision A11