W9812G6JB Datasheet, PDF (3/42 Pages) Winbond – 2M x 4 BANKS 꼌 16 BITS SDRAM

W9812G6JB
1. GENERAL DESCRIPTION
W9812G6JB is a high-speed synchronous dynamic random access memory (SDRAM), organized as
2M words  4 banks  16 bits. W9812G6JB delivers a data bandwidth of up to 166M words per
second. For different application, W9812G6JB is sorted into the following speed grades: -6/-6I/-75 and
75I. The -6/-6I is compliant to the 166MHz/CL3 specification (the -6I industrial grade which is
guaranteed to support -40°C ~ 85°C). The -75/75I is compliant to the 133MHz/CL3 specification (the
75I industrial grade which is guaranteed to support -40°C ~ 85°C).
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be
accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE
command. Column addresses are automatically generated by the SDRAM internal counter in burst
operation. Random column read is also possible by providing its address at each clock cycle. The
multiple bank nature enables interleaving among internal banks to hide the precharging time.
By having a programmable Mode Register, the system can change burst length, latency cycle,
interleave or sequential burst to maximize its performance. W9812G6JB is ideal for main memory in
high performance applications.
2. FEATURES
 3.3V ± 0.3V Power Supply
 Up to 166 MHz Clock Frequency
 2,097,152 Words  4 banks  16 bits organization
 Self Refresh Mode
 CAS Latency: 2 and 3
 Burst Length: 1, 2, 4, 8 and full page
 Burst Read, Single Writes Mode
 Byte Data Controlled by LDQM, UDQM
 Auto-precharge and Controlled Precharge
 4K Refresh cycles / 64 mS
 Interface: LVTTL
 Packaged in TFBGA 54 Ball (8X8 mm²), using lead free materials with RoHS compliant
3. ORDER INFORMATION
PART NUMBER
W9812G6JB-6
W9812G6JB-6I
W9812G6JB-75
W9812G6JB75I
SPEED
166MHz/CL3
166MHz/CL3
133MHz/CL3
133MHz/CL3
SELF REFRESH
CURRENT (MAX.)
2 mA
2 mA
2 mA
2 mA
OPERATING
TEMPERATURE
0°C ~ 70°C
-40°C ~ 85°C
0°C ~ 70°C
-40°C ~ 85°C
Publication Release Date: Oct. 15, 2013
-3-
Revision A02