W9812G6JB Datasheet, PDF (15/42 Pages) Winbond – 2M x 4 BANKS 꼌 16 BITS SDRAM

W9812G6JB
9.5 AC Characteristics and Operating Condition
(VDD = 3.3V ± 0.3V, TA = 0 to 70°C for -6/-75, TA= -40 to 85°C for -6I/75I) (Notes: 5, 6)
PARAMETER
Ref/Active to Ref/Active Command Period
Active to Precharge Command Period
Active to Read/Write Command Delay Time
Read/Write(a) to Read/Write(b)Command Period
Precharge to Active(b) Command Period
Active(a) to Active(b) Command Period
Write Recovery Time
CL* = 2
CL* = 3
SYM.
tRC
tRAS
tRCD
tCCD
tRP
tRRD
tWR
-6/-6I
MIN. MAX.
60
42 100000
15
1
15
12
2
2
-75/75I
MIN. MAX.
65
45 100000
20
1
20
15
2
2
UNIT
nS
tCK
nS
tCK
CLK Cycle Time
CL* = 2
7.5 1000 10 1000
tCK
CL* = 3
6
1000 7.5 1000
CLK High Level Width
CLK Low Level Width
Access Time from CLK
tCH
2
tCL
2
CL* = 2
tAC
CL* = 3
2.5
2.5
6
6
5
5.4
Output Data Hold Time
tOH
3
3
CL* = 2
6
6
Output Data High Impedance Time
tHZ
CL* = 3
5
5.4
Output Data Low Impedance Time
Power Down Mode Entry Time
Transition Time of CLK (Rise and Fall)
Data-in-Set-up Time
Data-in Hold Time
Address Set-up Time
Address Hold Time
CKE Set-up Time
CKE Hold Time
Command Set-up Time
Command Hold Time
Refresh Time
tLZ
0
0
nS
tSB
0
6
0
7.5
tT
1
1
tDS
1.5
1.5
tDH
0.8
0.8
tAS
1.5
1.5
tAH
0.8
0.8
tCKS
1.5
1.5
tCKH
0.8
0.8
tCMS 1.5
1.5
tCMH 0.8
0.8
tREF
64
64
mS
Mode Register Set Cycle Time
tRSC
2
2
tCK
Exit self refresh to ACTIVE command
tXSR
72
75
nS
*CL = CAS Latency
NOTES
8
8
9
9
9
7
9
8
8
8
8
8
8
8
8
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Publication Release Date: Oct. 15, 2013
Revision A02